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TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs
This paper presents the adoption of the triple modular redundancy coupled with the partial dynamic reconfiguration of field programmable gate arrays to mitigate the effects of soft errors in suchExpand
Application heartbeats: a generic interface for specifying program performance and goals in autonomous computing environments
TLDR
The Applications Heartbeats interface provides a standard method for an application to directly communicate its performance and goals while allowing autonomic services access to this information, and Heartbeat-enabled applications are no longer performance black-boxes. Expand
SEEC: A Framework for Self-aware Computing
TLDR
This paper presents the SEEC framework, a unified computational model designed to enable self-aware computing in both applications and system software that provides predictable behavior and allows SEEC to make decisions that achieve goals while optimizing resource utilization. Expand
Reconfigurable System Design and Verification
Focusing on system-level design and verification techniques, this text allows readers to immediately grasp concepts and put them into practice. It starts with an overview of reconfigurable computingExpand
A generalized software framework for accurate and efficient management of performance goals
TLDR
PTRADE is proposed, a novel performance management framework that is general with respect to the components it manages that can be deployed to work on a new system with different components without redesign and reimplementation. Expand
SEEC: A General and Extensible Framework for Self-Aware Computing
TLDR
The Self-aware Computing framework, or SEEC, is described and evaluated, which is used to build an adaptive system that optimizes performance per Watt for the PARSEC benchmarks on multiple machines, achieving results as least 1.65× better than a classical control system. Expand
Fault Tolerance Management in Cloud Computing: A System-Level Perspective
TLDR
An innovative, system-level, modular perspective on creating and managing fault tolerance in Clouds is introduced and a comprehensive high-level approach to shading the implementation details of the fault tolerance techniques to application developers and users by means of a dedicated service layer is proposed. Expand
Application heartbeats for software performance and health
TLDR
The Application Heartbeats framework provides a simple, standard programming interface that applications can use to indicate their performance and system software (and hardware) canuse to query an application's performance. Expand
A bird's eye view of FPGA-based Evolvable Hardware
TLDR
Some interesting results achieved so far in the Evolvable Hardware area are described and some hints on what should be done for increasing the efficiency of Evolable Hardware systems are given. Expand
Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation
TLDR
This paper provides a novel floorplanning automation framework, integrated in the Xilinx tool chain, which is based on an explicit enumeration of the possible placements of each region, and proposes a genetic algorithm (GA), enhanced with a local search strategy, to automate thefloorplanning activity on the defined direct problem representation. Expand
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