Skip to search formSkip to main contentSkip to account menu

Upsizing (database)

Known as: Upsizing 
Upsizing is the term coined by Microsoft to describe the process of upgrading Microsoft Access Database to a Microsoft SQL Server. This allows to… 
Wikipedia (opens in a new tab)

Related topics

Related topics

9 relations
Code refactoringFront and back endsMicrosoft AccessMicrosoft Jet Database Engine

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Lightning safety psyche
How is lightning protection ranked in the field of safety science? What is the general perception of the public with regard to… 
Highly Cited
2010
Highly Cited
2010
Class, race & hyperincarceration in revanchist America
tion of the post-civil rights era in America is the joint rolling back of the stingy social state and rolling out of the… 
Highly Cited
2010
Highly Cited
2010
Carbon nanotube correlation: Promising opportunity for CNFET circuit yield enhancement
Carbon Nanotubes (CNTs) are grown using chemical synthesis, and the exact positioning and chirality of CNTs are very difficult to… 
Highly Cited
2008
Highly Cited
2008
The Global Diffusion of Markets and Democracy: The international diffusion of public sector downsizing: network emulation and theory-driven learning
Highly Cited
2008
Highly Cited
2008
Nanometer MOSFET Variation in Minimum Energy Subthreshold Circuits
Minimum energy operation for digital circuits typically requires scaling the power supply below the device threshold voltage… 
Highly Cited
2006
Highly Cited
2006
Variation-Driven Device Sizing for Minimum Energy Sub-threshold Circuits
Sub-threshold operation is a compelling approach for energy-constrained applications, but increased sensitivity to variation must… 
Highly Cited
2005
Highly Cited
2005
Checkpointed early load retirement
Long-latency loads are critical in today's processors due to the ever-increasing speed gap with memory. Not only do these loads… 
Highly Cited
2005
Highly Cited
2005
A 110 GOPS/W 16-bit multiplier and reconfigurable PLA loop in 90-nm CMOS
This paper describes a 16 /spl times/ 16 bit single-cycle 2's complement multiplier with a reconfigurable PLA control block… 
2004
2004
A turbo decoder architecture with scalable parallelism
  • N. Engin
  • IEEE Workshop onSignal Processing Systems, . SIPS…
  • 2004
  • Corpus ID: 16712048
A scalable, programmable turbo decoder architecture is presented in this paper. The starting point is a comparison of the… 
Highly Cited
2001
Highly Cited
2001
Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources
The "one-size-fits-all" philosophy used for permanently allocating datapath resources in today's superscalar CPUs to maximize… 
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)