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TILEPro64
TILEPro64 is a multicore processor (Tile processor) manufactured by Tilera. It consists of a cache-coherent mesh network of 64 "tiles", where each…
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Related topics
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17 relations
Arithmetic logic unit
CPU cache
Cache coherence
History of computing hardware (1960s–present)
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
GPRM : a high performance programming framework for manycore processors
Ashkan Tousimojarad
2016
Corpus ID: 34628593
Processors with large numbers of cores are becoming commonplace. In order to utilise the available resources in such systems…
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Review
2015
Review
2015
Towards efficient security policy lookup on many-core network processing platforms
Xiang Wang
,
Yaxuan Qi
,
Kai Wang
,
Yibo Xue
,
Jun Yu Li
China Communications
2015
Corpus ID: 58784377
Modern network security devices employ packet classification and pattern matching algorithms to inspect packets. Due to the…
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Review
2015
Review
2015
Conception et évaluation des systèmes logiciels de classifications de paquets haute-performance. (Design and evaluation of high performance software based packet classification systems)
Peng He
2015
Corpus ID: 12086556
Packet classification consists of matching packet headers against a set of pre-defined rules, and performing the action(s…
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2014
2014
Locality-aware Scheduling and Characterization of Task-based Programs
Ananya Muddukrishna
2014
Corpus ID: 11125951
Modern computer architectures expose an increasing number of parallel features supported by complex memory access and…
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2014
2014
Cache-aware Parallel Programming for Manycore Processors
Ashkan Tousimojarad
,
W. Vanderbauwhede
arXiv.org
2014
Corpus ID: 1151048
With rapidly evolving technology, multicore and manycore processors have emerged as promising architectures to benefit from…
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2013
2013
Porting Barrelfish to the Tilera TILEPro64 Architecture
R. Radkiewicz
,
Xiaowen Wang
2013
Corpus ID: 62641361
Barrelfish is a research operating system with the focus on the scalability of manycore architectures and the increasing numbers…
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2012
2012
A Cilk Implementation of LTE Base-station up- link on the TILEPro64 Processor Master of Science Thesis in the Programme of Integrated Electronic System Design
Li Hao
2012
Corpus ID: 55340241
Cilk is a multithreaded programming language developed by MIT. It has a significant feature that its runtime system can schedule…
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2012
2012
Distance-Constrained Force-Directed Process Mapping for MPSoC Architectures
Timo Schönwald
,
A. Viehl
,
O. Bringmann
,
W. Rosenstiel
15th Euromicro Conference on Digital System…
2012
Corpus ID: 6274685
In this paper, we present a novel approach for automated mapping of software processes onto the cores of MPSoC architectures…
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2011
2011
ACilk Implementation of LTE Base-station uplink on the TILEPro64 Processor
Hao Li
2011
Corpus ID: 60321659
Cilk is a multithreaded programming language developed by MIT. It has a significant feature that its runtime system can schedule…
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2010
2010
Locality-Aware Many-Core Garbage Collection
Jin Zhou
,
Brian Demsky
2010
Corpus ID: 223113
The wide-scale deployment of multi-core and many-core processors will necessitate fundamental changes to garbage collectors…
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