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TILE64
Known as:
Tile (disambiguation)
TILE64 is a multicore processor manufactured by Tilera. It consists of a mesh network of 64 "tiles", where each tile houses a general purpose…
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15 relations
Arithmetic logic unit
CPU cache
GNU
GNU C Library
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Parallelization of Connected-Component Labeling on TILE64 Many-Core Platform
Chien-Wei Chen
,
Yi-Ta Wu
,
S. Tseng
,
Wen-Shan Wang
Journal of Signal Processing Systems
2013
Corpus ID: 46681445
Many-core technology is considering as a key to improve the performance of recent computer systems. To obtain good performance…
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Review
2012
Review
2012
Efficient Parallel Framework for H.264/AVC Deblocking Filter on Many-Core Platform
Yongdong Zhang
,
C. Yan
,
Feng Dai
,
Yike Ma
IEEE transactions on multimedia
2012
Corpus ID: 10318891
The H.264/AVC deblocking filter is becoming the performance bottleneck of H.264/AVC parallelization on many-core platform…
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2012
2012
Implementation of FFT and CRBLASTER on the Maestro processor
Jinwoo Suh
,
K. Mighell
,
D. Kang
,
S. Crago
IEEE Aerospace Conference
2012
Corpus ID: 44219083
Currently, most microprocessors use multiple cores to increase performance while limiting power usage. Some processors use not…
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2011
2011
Parallel deblocking filter for H.264/AVC implemented on Tile64 platform
C. Yan
,
Feng Dai
,
+4 authors
Yasong Zheng
IEEE International Conference on Multimedia and…
2011
Corpus ID: 14260627
For the purpose of accelerating deblocking filter, which accounts for a significant percentage of H.264/AVC decoding time, some…
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2011
2011
An Efficient Programming Paradigm for Shared-Memory Master-Worker Video Decoding on TILE64 Many-Core Platform
Xuan-Yi Lin
,
Kuan-Chou Lai
,
S. Tseng
,
Kuan-Ching Li
,
Yeh-Ching Chung
International Conference on Parallel Processing
2011
Corpus ID: 6509107
The ubiquity of many-core architectures brings challenges in making scalable application software, changing dramatically from the…
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2011
2011
Performance evaluation of canny edge detection on a tiled multicore architecture
Andrew Brethorst
,
N. Desai
,
Douglas Enright
,
Ronald Scrofano
Electronic imaging
2011
Corpus ID: 12109387
In the last few years, a variety of multicore architectures have been used to parallelize image processing applications. In this…
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2010
2010
Parallelization of Motion JPEG Decoder on TILE64 Many-Core Platform
Xuan-Yi Lin
,
Chung-Yu Huang
,
Pei-Man Yang
,
Tai-Wen Lung
,
S. Tseng
,
Yeh-Ching Chung
Methods and Tools of Parallel Programming…
2010
Corpus ID: 693743
The ubiquity of many-core architectures poses challenges to software developers to make scalable software. To parallelize data…
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2010
2010
Distributed Virtual Bit-Slice Synchronizer: A Scalable Hardware Barrier Mechanism for n-Dimensional Meshes
I. V. Zotov
IEEE transactions on computers
2010
Corpus ID: 12770854
The work presents a distributed hardware-level barrier mechanism for n-dimensional mesh-connected MIMD computers, called…
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Review
2010
Review
2010
Investigation of the Tilera processor for real time hazard detection and avoidance on the Altair Lunar Lander
C. Villalpando
,
Andrew E. Johnson
,
R. Some
,
J. Oberlin
,
S. Goldberg
IEEE Aerospace Conference
2010
Corpus ID: 35782636
The High Performance Processor (HPP) Task of the Advanced Avionics and Processor Systems (AAPS) Project, part of the Exploration…
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2007
2007
The Tile Processor™ architecture: Embedded multicore for networking and digital multimedia
IEEE Hot Chips Symposium
2007
Corpus ID: 44858928
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