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Standard cell

Known as: Standard, Cell-based IC, Library (disambiguation) 
In semiconductor design, standard cell methodology is a method of designing application-specific integrated circuits (ASICs) with mostly digital… 
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Related topics

Related topics

36 relations
AND gateAdder (electronics)Application-specific integrated circuitCMOS

Broader (1)

Electronic design automation

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
MiTexCube: MicroTextCluster Cube for online analysis of text cells and its applications
A fundamental problem of multidimensional text database analysis is efficient and effective support of various kinds of online… 
2010
2010
On The Impact of Target Technology in SHA-3 Hardware Benchmark Rankings
Both FPGAs and ASICs are widely used as the technology for comparing SHA-3 hardware benchmarking process. However, the im- pact… 
2008
2008
A Built-In Redundancy-Analysis Scheme for Random Access Memories with Two-Level Redundancy
Built-in self-repair (BISR) technique is a popular method for repairing defective embedded memories. To allocate redundancy… 
2007
2007
Development of TSMC 0.25µm Standard Cell Library
Standard library cells are basic building blocks for ASIC (Application-Specific Integrated Circuit) design, which improves… 
2005
2005
SEU-Resistant Magnetic Flip Flops
A roll stamper which molds a substrate resin sheet into an information recording media by continuously transferring preformat… 
2000
2000
A high-speed MAP architecture with optimized memory size and power consumption
This paper presents a novel high-speed maximum a posteriori (MAP) decoder architecture with optimized memory size and power… 
1999
1999
Reconfigurable Multiplier for Virtex FPGA Family
This paper describes integer multiplier design optimizations for FPGA technology. The changes in partial product generator… 
1997
1997
Fast minimization of multi-output Boolean functions in sum-of-condition-decoders structures
A CDEC gate, or a condition decoder, being a product of an AND and NAND of literals, has been introduced in the logic array of… 
1993
1993
Automatic Synthesis of Fast Compact Self-Timed Control Circuits
We present a tool called MEAT which has been designed to automatically synthesize transistor level, CMOS, self-timed control… 
1987
1987
Compilation of standard-cell libraries
The compilation approach used to generate and verify a complete standard-cell library is presented. Each standard cell is… 
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