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Retiming
Retiming is the technique of moving the structural location of latches or registers in a digital circuit to improve its performance, area, and/or…
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8 relations
And-inverter graph
C-slowing
Design closure
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Broader (1)
Formal methods
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
An algorithmic transformation for FPGA implementation of high throughput filters
H. M. Kamboh
,
S. Khan
International Conference on Emerging Technologies
2011
Corpus ID: 36204413
This paper proposes novel design methodologies for generating feed forward and recursive architectures for optimal mapping on…
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2005
2005
Integrating Logic Synthesis, Technology Mapping, and Retiming
A. Mishchenko
,
S. Chatterjee
,
R. Brayton
,
Peichen Pan
2005
Corpus ID: 5867110
This paper presents a synthesis method that combines logic synthesis, technology mapping, and retiming into a single integrated…
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Highly Cited
2000
Highly Cited
2000
IGRAINE-an Implication GRaph-bAsed engINE for fast implication, justification, and propagation
P. Tafertshofer
,
A. Ganz
,
K. Antreich
IEEE Trans. Comput. Aided Des. Integr. Circuits…
2000
Corpus ID: 5548644
Implication, justification, and propagation are three important Boolean problems that have to be solved during many tasks in…
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1997
1997
Retiming edge-triggered circuits under general delay models
Kumar N. Lalgudi
,
M. Papaefthymiou
IEEE Trans. Comput. Aided Des. Integr. Circuits…
1997
Corpus ID: 24593314
The retiming transformation can be used to optimize synchronous circuits for maximum speed of operation by relocating their…
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1995
1995
The Validity of Retiming Sequential Circuits
V. Singhal
,
C. Pixley
,
R. Rudell
,
R. Brayton
Design Automation Conference
1995
Corpus ID: 6884828
Retiming has been proposed as an optimization step for sequential circuits represented at the net-list level. Retiming moves the…
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1994
1994
Retiming sequential circuits to enhance testability
S. Dey
,
S. Chakradhar
Proceedings of the ... IEEE VLSI Test Symposium
1994
Corpus ID: 7181041
This paper presents a technique to enhance the testability of sequential circuits by repositioning registers. A novel retiming…
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1993
1993
Resource-constrained pipelining based on loop transformations
F. Sánchez
,
J. Cortadella
Microprocessing and Microprogramming
1993
Corpus ID: 16542674
1993
1993
Partial Scan with Retiming
D. Kagaris
,
S. Tragoudas
30th ACM/IEEE Design Automation Conference
1993
Corpus ID: 5474596
A generally effective approach to the partial scan problem is to select flip-flops that break the cyclic structure of the circuit…
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Highly Cited
1991
Highly Cited
1991
Understanding retiming through maximum average-weight cycles
M. Papaefthymiou
ACM Symposium on Parallelism in Algorithms and…
1991
Corpus ID: 5682889
A synchronous circuit built of functional elements and registers is a simple implementation of the semisystolic model of…
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1985
1985
Topological Transformations as a Tool in the Design of Systolic Networks
K. Culík
,
I. Fris
Theoretical Computer Science
1985
Corpus ID: 19276450
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