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R10000

Known as: R12000A, R14000A, R16000A 
The R10000, code-named "T5", is a RISC microprocessor implementation of the MIPS IV instruction set architecture (ISA) developed by MIPS Technologies… 
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Papers overview

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2003
2003
Optimization techniques such as loop-unrolling and trace-scheduling can result in long straight-line codes. It is, however… 
2001
2001
  • Wendy Korn
  • 2001
  • Corpus ID: 16523601
The wide use of performance counters by application developers and benchmarking teams gives evidence that performance counters… 
2001
2001
  • Bob GlammD. Lilja
  • 2001
  • Corpus ID: 33348800
Instruction-level simulation is the basis for much research in computer architecture. Typically, the simulators used for this… 
2001
2001
We show cache friendly implementations of the Floyd-Warshall algorithm for the all-pairs shortest-path problem. We first compare… 
2000
2000
There are many engineering challenges that must be addressed in order to successfully integrate haptics with the environmental… 
2000
2000
The latency of accessing instructions and data from the memory subsystem is an increasingly crucial performance bottleneck in… 
1999
1999
Sparse matrices are in the kernel of numerical applications. Their compressed storage, which permits both operations and memory… 
1996
1996
  • G. Kis
  • 1996
  • Corpus ID: 161992898
Daltonia latolimbata Broth. described in 1916 from the Bolivian Andes occurs also in the high African mountains, consequently is… 
1994
1994
Not to be left out in the move to the next generation of RISC, MIPS Technologies (MTI) unveiled the design of the R10000, also…