Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 225,166,820 papers from all fields of science
Search
Sign In
Create Free Account
R10000
Known as:
R12000A
, R14000A
, R16000A
Expand
The R10000, code-named "T5", is a RISC microprocessor implementation of the MIPS IV instruction set architecture (ISA) developed by MIPS Technologies…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
38 relations
64-bit computing
ARCS (computing)
ASCI Blue Mountain
Adder (electronics)
Expand
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2003
2003
The Power of Belady?s Algorithm in Register Allocation for Long Basic Blocks
Jiayang Guo
,
M. Garzarán
,
D. Padua
International Workshop on Languages and Compilers…
2003
Corpus ID: 7773261
Optimization techniques such as loop-unrolling and trace-scheduling can result in long straight-line codes. It is, however…
Expand
2001
2001
Just how accurate are performance counters?
Wendy Korn
Conference Proceedings of the IEEE International…
2001
Corpus ID: 16523601
The wide use of performance counters by application developers and benchmarking teams gives evidence that performance counters…
Expand
2001
2001
Automatic verification of instruction set simulation using synchronized state comparison
Bob Glamm
,
D. Lilja
Proceedings. 34th Annual Simulation Symposium
2001
Corpus ID: 33348800
Instruction-level simulation is the basis for much research in computer architecture. Typically, the simulators used for this…
Expand
2001
2001
Cache-friendly implementations of transitive closure
Michael Penner
,
V. Prasanna
Proceedings International Conference on Parallel…
2001
Corpus ID: 2455731
We show cache friendly implementations of the Floyd-Warshall algorithm for the all-pairs shortest-path problem. We first compare…
Expand
2000
2000
Design constraints for haptic surgery simulation
Oliver R. Astley
,
V. Hayward
Proceedings ICRA. Millennium Conference. IEEE…
2000
Corpus ID: 16057628
There are many engineering challenges that must be addressed in order to successfully integrate haptics with the environmental…
Expand
2000
2000
Optimizing the cache performance of non-numeric applications
C. Luk
2000
Corpus ID: 60660107
The latency of accessing instructions and data from the memory subsystem is an increasingly crucial performance bottleneck in…
Expand
1999
1999
Direct mapped cache performance modeling for sparse matrix operations
R. Doallo
,
B. Fraguela
,
E. Zapata
Proceedings of the Seventh Euromicro Workshop on…
1999
Corpus ID: 15176085
Sparse matrices are in the kernel of numerical applications. Their compressed storage, which permits both operations and memory…
Expand
1997
1997
Comparisons of the MPI and PVM performances by using structured and unstructured CFD codes
E. Bucchignani
,
R. Mella
,
P. Schiano
,
G. Richelli
Conference on Parallel Computational Fluid…
1997
Corpus ID: 60815621
1996
1996
Taxonomic Results of the BRYOTROP-Expedition to Zaire and Rwanda 31. The Andean Daltonia latolimbata Broth. in Herzog in Africa
G. Kis
1996
Corpus ID: 161992898
Daltonia latolimbata Broth. described in 1916 from the Bolivian Andes occurs also in the high African mountains, consequently is…
Expand
1994
1994
MIPS R10000 Uses Decoupled Architecture: 10/24/94
MI Cro Ossor
1994
Corpus ID: 6114297
Not to be left out in the move to the next generation of RISC, MIPS Technologies (MTI) unveiled the design of the R10000, also…
Expand
By clicking accept or continuing to use the site, you agree to the terms outlined in our
Privacy Policy
(opens in a new tab)
,
Terms of Service
(opens in a new tab)
, and
Dataset License
(opens in a new tab)
ACCEPT & CONTINUE