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64-bit computing
Known as:
LP64
, Native x86-64 Windows software
, 64-bit OS
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In computer architecture, 64-bit computing is the use of processors that have datapath widths, integer size, and memory address widths of 64 bits…
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Related topics
Related topics
50 relations
3 GB barrier
32-bit
ARM architecture
Address space
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2009
2009
High-speed Parallel 32×32-b Multiplier Using a Radix-16 Booth Encoder
Chen Ping-hua
,
Zhao Juan
Third International Symposium on Intelligent…
2009
Corpus ID: 11519713
a 32×32-b High-speed Parallel Multiplier is proposed in this paper. The new Multiplier uses a Radix-16 Booth Encoder, uses a…
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Highly Cited
2007
Highly Cited
2007
Efficient Handling of N-gram Language Models for Statistical Machine Translation
Marcello Federico
,
M. Cettolo
WMT@ACL
2007
Corpus ID: 603858
Statistical machine translation, as well as other areas of human language processing, have recently pushed toward the use of…
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Highly Cited
2005
Highly Cited
2005
Data Encryption Standard (DES)
A. Biryukov
,
C. Cannière
Encyclopedia of Cryptography and Security
2005
Corpus ID: 6547274
Background TheData Encryption Standard (DES) [] has been around for more than years. During this time, the standard was…
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Review
2004
Review
2004
DESIGN OF GLOBAL SAW RFID TAG DEVICES
C. Hartmann
,
P. Brown
,
J. Bellamy
2004
Corpus ID: 9372206
The Global SAW Tag [1] is projected to be a large-volume SAW device application. The modulation method and overall tag data…
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2000
2000
Increasing relevance of memory hardware errors: a case for recoverable programming models
D. Milojicic
,
A. Messer
,
J. Shau
,
G. Fu
,
Alberto Muñoz
ACM SIGOPS European Workshop
2000
Corpus ID: 12573765
It is a common belief that most of computer system failures nowadays stem from programming errors. Computer systems are becoming…
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Highly Cited
1999
Highly Cited
1999
Experimenting with Shared Generation of RSA Keys
Michael Malkin
,
Thomas D. Wu
,
D. Boneh
Network and Distributed System Security Symposium
1999
Corpus ID: 11088284
We describe an implementation of a distributed algorithm to generate a shared RSA key. At the end of the computation, an RSA…
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Highly Cited
1998
Highly Cited
1998
1 GHz 64-bit high-speed comparator using ANT dynamic logic with two-phase clocking
Chua-Chin Wang
,
Chung-Yu Wu
,
Kun-Chu Tsai
1998
Corpus ID: 61525670
A high-speed 64-bit comparator using two-phase clocking dynamic CMOS logic with modified noninverting all-N-transistor block is…
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Highly Cited
1995
Highly Cited
1995
UltraSPARC: the next generation superscalar 64-bit SPARC
D. Greenley
,
J. Bauman
,
+26 authors
G. Zyner
Digest of Papers. COMPCON'95. Technologies for…
1995
Corpus ID: 2254629
UltraSPARC is the first microprocessor from Sun Microsystems' SPARC Technology Business to implement the new 64-bit SPARC V9…
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Review
1993
Review
1993
Overview of the CHIP Compiler System
A. Aggoun
,
Nicolas Beldiceanu
Workshop on Constraint Logic Programming
1993
Corpus ID: 27206835
The MIPSpro compiler system consists of a set of components that enable you to create new 32-bit and 64-bit executable programs…
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Highly Cited
1984
Highly Cited
1984
STAFAN: An Alternative to Fault Simulation
Sunil K. Jain
,
V. Agrawal
Design Automation Conference, Proceedings
1984
Corpus ID: 13209626
STAtistical Fault ANalysis (STAFAN) is proposed as an alternative to fault simulation of digital circuits. In this analysis…
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