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Polycide

Polycide is a silicide formed over polysilicon. Widely used in DRAMs. In a polycide MOSFET transistor process, the silicide is formed only over the… Expand
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3 relations
SalicideTransistor

Broader (1)

Semiconductor device fabrication

Papers overview

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2002
2002
The abnormality in gate oxide failure induced by stress-enhanced diffusion of polycrystalline silicon
Abstract An abnormal gate oxide failure was found in DRAM using deep submicron technology. Contrary to the general dielectric… Expand
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1997
1997
Direct simulation Monte Carlo of inductively coupled plasma and comparison with experiments
ABSTRACT Direct simulation Monte Carlo was used to study ion and neutral transport and reaction in a low-gas-pressure highplasma… Expand
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1997
1997
A New Tungsten Gate Metal Oxide Semiconductor Capacitor Using a Chemical Vapor Deposition Process
A new process for tungsten gate metal oxide semiconductor (MOS) capacitors has been developed using chemical vapor deposition… Expand
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1997
1997
0.25/spl mu/m W-polycide Dual Gate And Buried Metal On Diffusion Layer (BMD) Technology For DRAM-embedded Logic Devices
A 0.25pm logic process technology, which is suitable for high-speed, low-voltage operation, logic and DRAM integration in one… Expand
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1993
1993
Device fabrication and characteristics of surface-channel PMOSFET with WSi/sub x/ polycide gate using dopant drive-out technique
Surface-channel PMOSFET's have been realized using a dopant-drive-out technique with WSi/sub x/ polycide gate. The advantages of… Expand
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1992
1992
Dual (n+/p+) Polycide Interconnect Technology using poly-Si/WSiZ/poly-Si Structure and Post B+ Implantation
Formation of low resistance p+ contact was the most difficult problem for Dual(n+/p+) Polycide Interconnect by which both n… Expand
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1991
1991
Direct evidence of gate oxide thickness increase in tungsten polycide processes
The increase of the effective gate oxide thickness for W-polycide processes is studied. The samples with as-deposited and… Expand
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1991
1991
Technology limitations for N/sup +//P/sup +/ polycide gate CMOS due to lateral dopant diffusion in silicide/polysilicon layers
The device degradation of dual-polycide-gate N/sup +//P/sup +/ CMOS polycide transistors due to the lateral diffusion of dopants… Expand
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1989
1989
Avoiding Lateral Diffusion of Dopants in n+/p+ Polycide Gates
  • D. Amm, D. Levy, +4 authors G. Goltz
  • ESSDERC '89: 19th European Solid State Device…
  • 1989
    • Corpus ID: 36421257
The lateral diffusion of dopants in a TiSi2 salicide process was studied for various BPSG reflow RTP anneals. Lateral diffusion… Expand
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Highly Cited
1983
Highly Cited
1983
Properties of low-pressure CVD tungsten silicide for MOS VLSI interconnections
Low-pressure chemical vapor deposition of tungsten silicide has been done and the properties of the deposited films have been… Expand
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