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A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O(5-x)/TaO(2-x) bilayer structures.
TLDR
This work demonstrates a TaO(x)-based asymmetric passive switching device with which it was able to localize resistance switching and satisfy all aforementioned requirements, and eliminates any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays. Expand
High-mobility and low-power thin-film transistors based on multilayer MoS2 crystals.
TLDR
This is the first comprehensive investigation of process-friendly multilayer molybdenum disulphide field-effect transistors and their results provide potentially important implications in the fabrication of high-resolution large-area displays and further scientific investigation of various physical properties expected in other layered semiconductors. Expand
A 90 nm 1.8 V 512 Mb Diode-Switch PRAM With 266 MB/s Read Throughput
TLDR
A 512 Mb diode-switch PRAM developed in a 90 nm CMOS technology using the SEG technology has achieved minimum cell size and disturbance-free core operation and achieved read throughput of 266 MB/s through the proposed schemes. Expand
Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming
TLDR
The use of barrier-engineered materials and gate all-around structure in the 3D V-NAND cell exhibits advantages over 1 × nm planar NAND, such as small Vth shift due to small cell coupling and narrow natural Vth distribution. Expand
A New Investigation of Data Retention Time in Truly Nanoscaled DRAMs
Data retention time for ultimate DRAMs with an extremely scaled-down cell size has been investigated. The entire memory cells can be discretely categorized by two groups: leaky cells or normal cells,Expand
Graphene Barristor, a Triode Device with a Gate-Controlled Schottky Barrier
TLDR
It is shown that for a graphene-silicon interface, Fermi-level pinning can be overcome and a triode-type device with a variable barrier, a “barristor,” can be made and used to create devices such as inverters. Expand
A 0.1-$\mu{\hbox {m}}$ 1.8-V 256-Mb Phase-Change Random Access Memory (PRAM) With 66-MHz Synchronous Burst-Read Operation
TLDR
A 256-Mb phase-change random access memory has been developed, featuring 66-MHz synchronous burst-read operation, featuring endurance and retention characteristics measured to be 107 cycles and ten years at 99 degC. Expand
A Zeroing Cell-to-Cell Interference Page Architecture With Temporary LSB Storing and Parallel MSB Program Scheme for MLC NAND Flash Memories
TLDR
A novel page architecture including temporary LSB storing program and parallel MSB program schemes is proposed to reduce cell-to-cell interference and to improve average MLC program speed performance by 11% compared with conventional architecture, thanks to its fast LSB program performance. Expand
Full Integration of Highly Manufacturable 512Mb PRAM based on 90nm Technology
Fully functional 512Mb PRAM with 0.047mum2 (5.8F2) cell size was successfully fabricated using 90nm diode technology in which the authors developed novel process schemes such as vertical diode asExpand
A role for graphene in silicon-based semiconductor devices
TLDR
Graphene is unlikely to replace silicon completely, however, because of the poor on/off current ratio resulting from its zero bandgap, but it could be used to improve silicon-based devices, in particular in high-speed electronics and optical modulators. Expand
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