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NMOS logic
Known as:
N-type metal-oxide-semiconductor
, NMOS
N-type metal-oxide-semiconductor logic uses n-type field effect transistors (MOSFETs) to implement logic gates and other digital circuits. These nMOS…
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44 relations
1801 series CPU
AMD Lance Am7990
AND-OR-Invert
Application-specific integrated circuit
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Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2007
Highly Cited
2007
(Japanese Journal of Applied Physics,46(4B):2107-2111)Impact of Source/Drain Si1 yCy Stressors on Silicon-on-Insulator N-type Metal-Oxide-Semiconductor Field-Effect Transistors
C. -. Lin
,
Shu-Tong Chang
,
Jacky Huang
,
Wei-Ching Wang
,
J. Fan
2007
Corpus ID: 113479203
Highly Cited
2006
Highly Cited
2006
A wide locking range and low Voltage CMOS direct injection-locked frequency divider
Yun-Hsueh Chuang
,
S.-H. Lee
,
R.-H. Yen
,
S. Jang
,
J.-F. Lee
,
M. Juang
IEEE Microwave and Wireless Components Letters
2006
Corpus ID: 6709244
A low voltage and wide locking range injection-locked frequency divider using a standard 0.18-/spl mu/m complementary metal oxide…
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Highly Cited
2004
Highly Cited
2004
Monolithic Integration of Carbon Nanotube Devices with Silicon MOS Technology
Yu-Chih Tseng
,
Peiqi Xuan
,
+4 authors
H. Dai
2004
Corpus ID: 1560670
An integrated circuit combining single-walled carbon nanotube (SWNT) devices with n-channel metal oxide semiconductor (NMOS…
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Highly Cited
2004
Highly Cited
2004
Electrical analysis of mechanical stress induced by STI in short MOSFETs using externally applied stress
C. Gallon
,
G. Reimbold
,
+6 authors
H. Dansas
IEEE Transactions on Electron Devices
2004
Corpus ID: 25533767
This paper presents an electrical analysis of mechanical stress induced by shallow trench isolation (STI) on MOSFETs of advanced…
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Highly Cited
2000
Highly Cited
2000
A CMOS charge pump for low voltage operation
Y. Moisiadis
,
I. Bouras
,
A. Arapoyanni
IEEE International Symposium on Circuits and…
2000
Corpus ID: 17976089
This paper proposes a low-voltage, high performance charge pump circuit suitable for implementation in standard CMOS technologies…
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Highly Cited
1998
Highly Cited
1998
A 1.4-GHz 3-mW CMOS LC low phase noise VCO using tapped bond wire inductances
Tamara I. Ahrens
,
T. Lee
Proceedings / International Symposium on Low…
1998
Corpus ID: 8572741
A 1.4-GHz LC voltage-controlled oscillator has been implemented in a MOSIS 0.5-/spl mu/m CMOS process. Complementary cross…
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Highly Cited
1994
Highly Cited
1994
Ultrafast operation of V/sub th/-adjusted p/sup +/-n/sup +/ double-gate SOI MOSFET's
Tetsu Tanaka
,
Kunihiro Suzuki
,
Hiroshi Horie
,
Toshihiro Sugii
IEEE Electron Device Letters
1994
Corpus ID: 22419079
To optimize the V/sub th/ of double-gate SOI MOSFET's, we fabricated devices with p/sup +/ poly-Si for the front-gate electrode…
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Highly Cited
1985
Highly Cited
1985
NMOS protection circuitry
R. Rountree
,
C. L. Hutchins
IEEE Transactions on Electron Devices
1985
Corpus ID: 36494336
This paper discusses the major models that relate to breakdown phenomena and how they relate to protection-circuit design. The…
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Highly Cited
1984
Highly Cited
1984
Super Recovery of Total Dose Damage in MOS Devices
A. Johnston
IEEE Transactions on Nuclear Science
1984
Corpus ID: 27185792
Super recovery of the gate threshold voltage has been observed for several types of commercial NMOS integrated circuits. These…
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Highly Cited
1984
Highly Cited
1984
Recursive implementation of optimal time VLSi integer multipliers
W. Luk
,
J. Vuillemin
1984
Corpus ID: 723426
We present two algorithms suitable for VLSI implementation of very fast log/V-time multipliers. The first one achieves provably…
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