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Memory model (programming)

Known as: Memory model, Memory model (computing) 
In computing, a memory model describes the interactions of threads through memory and their shared use of the data.
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Related topics

Related topics

17 relations
C++C++03C++11C11 (C standard revision)

Broader (2)

Computer memoryConcurrency (computer science)

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
Effective abstractions for verification under relaxed memory models
2012
2012
Avoiding Catastrophic Forgetting by a Biologically Inspired Dual-Network Memory Model
In neural networks, when new patterns are learned by a network, they radically interfere with previously stored patterns. This… 
2010
2010
Reasoning Processes in Propositional Logic
We conducted a computer-based psychological experiment in which a random mix of 40 tautologies and 40 non-tautologies were… 
2008
2008
An Adaptive User Profile Based on Memory Model
Understanding the interests and behaviors of Web users serves as the core of many Web usage data mining applications such as… 
2005
2005
Towards an understanding of the behavior of the single parent rule in the RTSJ scoped memory model
The memory model used in the real-time specification for Java (RTSJ) imposes strict assignment rules to or from memory areas… 
2004
2004
A memory model for internet hits after media exposure
2001
2001
A knowledge base for indexing and retrieving disassembly plans
Disassembly has become an important issue recently, as people begin to be concerned about the environment and natural resources… 
1993
1993
An Underlying Memory Model to Support Case Retrieval
The goal of the work described in this paper is to provide a general and underlying model of memory to support the process of… 
1993
1993
Specifying system requirements for memory consistency models
The memory consistency model of a shared-memory system determines the order in which memory accesses can be executed by the… 
Review
1980
Review
1980
Reliability and Performance of Error-Correcting Memory and Register Arrays
A brief survey of memory chip failure modes shows that partial chip failures are the dominant failure mode. A single error… 
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