• Publications
  • Influence
The gem5 simulator
TLDR
The gem5 simulation infrastructure is the merger of the best aspects of the M5 [4] and GEMS [9] simulators. Expand
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Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset
TLDR
The Wisconsin Multifacet Project has created a simulation toolset to characterize and evaluate the performance of multiprocessor hardware systems commonly used as database and web servers using a suite of scaled-down commercial workloads. Expand
  • 1,608
  • 162
  • PDF
LogTM: log-based transactional memory
TLDR
Transactional memory (TM) simplifies parallel programming by guaranteeing that transactions appear to execute atomically and in isolation. Expand
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  • PDF
Amdahl's Law in the Multicore Era
TLDR
Augmenting Amdahl's law with a corollary for multicore hardware makes it relevant to future generations of chips with multiple processor cores. Expand
  • 785
  • 66
LogTM-SE: Decoupling Hardware Transactional Memory from Caches
TLDR
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). Expand
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  • PDF
Efficiently enabling conventional block sizes for very large die-stacked DRAM caches
TLDR
Die-stacking technology enables multiple layers of DRAM to be integrated with multicore processors. Expand
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  • PDF
DBMSs on a Modern Processor: Where Does Time Go?
TLDR
A framework for analyzing query execution time on a DBMS running on a server with a modern processor and memory architecture. Expand
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Amdahl's Law in the Multicore Era
  • M. Hill
  • Computer Science
  • Computer
  • 24 October 2008
TLDR
Augmenting Amdahl's law with a corollary for multicore hardware makes it relevant to future generations of chips with multiple processor cores. Expand
  • 575
  • 41
  • PDF
A Primer on Memory Consistency and Cache Coherence
TLDR
We present both highlevel concepts as well as specific, concrete examples. Expand
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Weaving Relations for Cache Performance
TLDR
We propose a new data organization model called PAX (Partition Attributes Across), that significantly improves cache performance by grouping together all values of each attribute within each page. Expand
  • 384
  • 40
  • PDF
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