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Memory architecture
Memory architecture describes the methods used to implement electronic computer data storage in a manner that is a combination of the fastest, most…
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16-bit
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Bus (computing)
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Computer memory
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
Memory management mechanism for hybrid memory architecture based on new non-volatile memory
Qi Li
,
Jiang Zhong
,
Xue Li
,
Qing Li
2019
Corpus ID: 198352661
With the rapid development of internet and cloud computing technology, the existing dynamic random access memory (DRAM) have been…
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2013
2013
FILL Wi CAPITALIZING ON FAILURE THROUGH CASE-BASED INFERENCE
J. Kolodner
2013
Corpus ID: 39518408
2010
2010
A Design of Buffer Scheme by Using Data Filter for Solid State Disk
J. Yang
2010
Corpus ID: 64529102
2009
2009
Embedded Memory Architecture for Low-Power Application Processor
H. Yoo
,
Donghyun Kim
2009
Corpus ID: 54723367
Currently, the state-of-the-art high-end processors operate at 3–4 GHz frequency whereas even the fastest off-chip memory…
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2003
2003
An efficient functional test for the massively-parallel C/spl middot/RAM logic-enhanced memory architecture
Xiaoling Sun
,
B. Cockburn
,
D. Elliott
Proceedings 18th IEEE Symposium on Defect and…
2003
Corpus ID: 35797591
Computational RAM (C/spl middot/RAM) is a logic-enhanced memory architecture that has already shown promise in several demanding…
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2003
2003
Processor/memory co-exploration on multiple abstraction levels
G. Braun
,
Andreas Wieferink
,
O. Schliebusch
,
R. Leupers
,
H. Meyr
,
A. Nohl
Design, Automation and Test in Europe Conference…
2003
Corpus ID: 15404809
Recently, the evolution of embedded systems has shown a strong trend towards application-specific, single-chip solutions. As a…
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2000
2000
Experimenting NUMA for scaleable CDR processing
Wijnand Derks
,
S. Dijkstra
,
H. Enting
,
W. Jonker
,
J. Wijnands
2000
Corpus ID: 16222849
This paper describes the final results of an assessment of the scalability of the NUMA architecture for very large CDR databases…
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1995
1995
Architectural exploration for datapaths with memory hierarchy
N. D. Holmes
,
D. Gajski
Proceedings the European Design and Test…
1995
Corpus ID: 7496784
In this paper, we present a new design-space exploration algorithm, the architecture explorer (AE), for analyzing performance…
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1994
1994
Memory Architecture and Parallel Access
M. Gössel
,
B. Rebel
,
R. Creutzburg
1994
Corpus ID: 60584680
Introduction. Theory of Raster or Array Memories. Fundamental concepts and notions. Module assignment functions and conflict-free…
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1986
1986
The memory architecture and the cache and memory management unit for the fairchild clipper processor
Jeonghun Cho
,
A. Smith
,
H. Sachs
1986
Corpus ID: 59878150
The Fairchild CLIPPER is a new high-performance three chip module consisting of a microprocessor chip and two cache and memory…
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