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Memory architecture
Memory architecture describes the methods used to implement electronic computer data storage in a manner that is a combination of the fastest, most…
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30 relations
16-bit
32-bit
8-bit
Bus (computing)
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Broader (1)
Computer memory
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2010
2010
Parallel Simulation of Massively Coupled Interconnect Networks
D. Paul
,
N. Nakhla
,
R. Achar
,
M. Nakhla
IEEE Transactions on Advanced Packaging
2010
Corpus ID: 40396693
In a system containing high-speed interconnects, the presence of a large number of coupled lines seriously limits the ability to…
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2009
2009
Evaluating CMPs and Their Memory Architecture
C. Jesshope
,
M. Lankamp
,
Li Zhang
ARCS
2009
Corpus ID: 1975581
Many-core processor architectures require scalable solutions that reflect the locality and power constraints of future…
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2007
2007
Low-Power High-Performance and Dynamically Configured Multi-Port Cache Memory Architecture
H. Bajwa
,
EE X.Chen
The International Conference on Electrical…
2007
Corpus ID: 11761971
As on-chip cache size has increased considerably in recent high-performance microprocessor technologies, power dissipation and…
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2006
2006
Parallel Memory Architecture for Arbitrary Stride Accesses
E. Aho
,
Jarno Vanne
,
T. Hämäläinen
IEEE Design and Diagnostics of Electronic…
2006
Corpus ID: 11360818
Parallel memory modules can be used to increase memory bandwidth and feed a processor with only necessary data. Arbitrary stride…
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2005
2005
Efficient memory management for message-passing concurrency, Part I : Single-threaded execution
Jesper Wilhelmsson
2005
Corpus ID: 60104751
Manual memory management is error prone. Some of the errors it causes, in particular memory leaks and dangling pointers, are hard…
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2003
2003
Processor/memory co-exploration on multiple abstraction levels
G. Braun
,
Andreas Wieferink
,
O. Schliebusch
,
R. Leupers
,
H. Meyr
,
A. Nohl
Design, Automation and Test in Europe Conference…
2003
Corpus ID: 15404809
Recently, the evolution of embedded systems has shown a strong trend towards application-specific, single-chip solutions. As a…
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Review
2000
Review
2000
CHIPKILL CORRECT MEMORY ARCHITECTURE
David Locklear
2000
Corpus ID: 2804813
This article reviews the chipkill correct memory architecture that is currently implemented in DellTM PowerEdgeTM 6400 and 6450…
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1995
1995
Architectural exploration for datapaths with memory hierarchy
N. D. Holmes
,
D. Gajski
Proceedings the European Design and Test…
1995
Corpus ID: 7496784
In this paper, we present a new design-space exploration algorithm, the architecture explorer (AE), for analyzing performance…
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1994
1994
Memory Architecture and Parallel Access
M. Gössel
,
B. Rebel
,
R. Creutzburg
1994
Corpus ID: 60584680
Introduction. Theory of Raster or Array Memories. Fundamental concepts and notions. Module assignment functions and conflict-free…
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1986
1986
The memory architecture and the cache and memory management unit for the fairchild clipper processor
Jeonghun Cho
,
A. Smith
,
H. Sachs
1986
Corpus ID: 59878150
The Fairchild CLIPPER is a new high-performance three chip module consisting of a microprocessor chip and two cache and memory…
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