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MCDRAM
Multi-Channel DRAM or MCDRAM (pronounced em cee dee ram) is a 3D-stacked DRAM that is used in the Intel Xeon Phi processor codenamed Knights Landing…
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Related topics
Related topics
8 relations
Broader (3)
Computer architecture
Computer memory
Parallel computing
Dynamic random-access memory
High Bandwidth Memory
Hybrid Memory Cube
Three-dimensional integrated circuit
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
Initial benchmarking of the Intel 3D-stacked MCDRAM
Benjamin S. Parsons
2019
Corpus ID: 204095499
Modern, manycore processors are increasingly using high-bandwidth memory (HBM) to provide the necessary memory bandwidth to high…
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2018
2018
Data Placement on Heterogeneous Memory Architectures
M. Laghari
2018
Corpus ID: 119098151
Memory bandwidth has long been the limiting scaling factor for high-performance applications. To overcome this limitation…
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2018
2018
McDRAM: Low Latency and Energy-Efficient Matrix Computation in DRAM
신현승
2018
Corpus ID: 203686132
2017
2017
An Efficient Implementation of the Transitive Closure Problem on Intel KNL Architecture
I. Afanasyev
2017
Corpus ID: 53507711
An important trend in modern supercomputing is a frequent usage of co-processors, such as GPUs and Intel Xeon PHIs. The recent…
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2017
2017
Current State of the Cray MPT Software Stacks on the Cray XC Series Supercomputers
K. Kandalla
,
P. Mendygral
,
+5 authors
M. Cray
2017
Corpus ID: 38480662
HPC applications heavily rely on Message Passing Interface (MPI) and SHMEM programming models to develop distributed memory…
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2016
2016
Optimization and Evaluation of VLPL-S Particle-in-cell Code on Knights Landing
D. Ding
,
Minhua Wen
,
Shan Zhou
,
Min Chen
,
James Lin
2016
Corpus ID: 62831827
VLPL-S code is developed based on the particlein-cell (PIC) algorithm, which is the mainstream algorithm of plasma behavior…
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2016
2016
Estimating the Performance Impact of the MCDRAM on KNL Using Dual-Socket Ivy Bridge Nodes on Cray XC 30
Zhengji Zhao
,
M. Marsman
2016
Corpus ID: 13136452
NERSC is preparing for its next petascale system, named Cori, a Cray XC system based on the Intel KNL MIC architecture. Each Cori…
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2016
2016
Intel ® Xeon Phi TM Processor 7200 Family Memory Management Optimizations
2016
Corpus ID: 52228027
This paper examines software performance optimization for an implementation of a nonlibrary version of DGEMM executing on the…
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2016
2016
Enhancing application performance using heterogeneous memory architectures on a many-core platform
S. Li
,
Karthik Raman
,
Ruchira Sasanka
International Symposium on High Performance…
2016
Corpus ID: 206711961
The 2nd generation Intel® Xeon Phi processor (codenamed Knights Landing) is Intel's first self-booting Xeon Phi processor that is…
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2016
2016
Performance Comparison of a Two-Dimensional Elliptic Test Problem on Intel Xeon Phis REU Site : Interdisciplinary Program in High Performance Computing
Ishmail A. Jabbie
,
G. Owen
,
Benjamin Whiteley
,
Jonathan S. Graf
,
M. Gobbert
2016
Corpus ID: 15792203
The Intel Xeon Phi is a many-core processor with a theoretical peak performance of approximately 1 TFLOP/s in double precision…
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