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Hardware acceleration

Known as: Hardware-accelerated, Acceleration hardware, Hardware accelerators 
In computing, hardware acceleration is the use of computer hardware to perform some functions more efficiently than is possible in software running… 
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Related topics

Related topics

50 relations
Advanced Simulation LibraryComparison of OpenGL and Direct3DConcurrency (computer science)Crystal Space

Broader (2)

Central processing unitGraphics hardware

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2011
Highly Cited
2011
Algorithm and Architecture Co-Design of Hardware-Oriented, Modified Diamond Search for Fast Motion Estimation in H.264/AVC
In this paper, we present a new hardware-oriented, modified diamond search (HMDS) algorithm, for fast integer pel, motion… 
Highly Cited
2010
Highly Cited
2010
Modified Entropic Force
The theory of statistical thermodynamics tells us the equipartition law of energy does not hold in the limit of very low… 
Highly Cited
2008
Highly Cited
2008
Finite-element analysis of bicycle helmet oblique impacts
Highly Cited
2007
Highly Cited
2007
Convergence Acceleration Operator for Multiobjective Optimization
A convergence acceleration operator (CAO) is described which enhances the search capability and the speed of convergence of the… 
Highly Cited
2007
Highly Cited
2007
Efficient Complex Matrix Inversion for MIMO Software Defined Radio
Complex matrix inversion is a very computationally demanding operation in advanced multi-antenna wireless communications… 
Highly Cited
2007
Highly Cited
2007
A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs
Multimedia applications, and in particular the encoding and decoding of standard image and video formats, are usually a typical… 
Highly Cited
2003
Highly Cited
2003
Parallel 4/spl times/4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264
Transform coding has been widely used in video coding standards. In this paper, a hardware architecture for accelerating… 
Highly Cited
2003
Highly Cited
2003
Mechanistic modelling of the milling process using an adaptive depth buffer
Highly Cited
2001
Highly Cited
2001
Data retention behavior of a SONOS type two-bit storage flash memory cell
  • W. TsaiN. Zous S. Gu
  • International Electron Devices Meeting. Technical…
  • 2001
  • Corpus ID: 34486471
Data retention loss mechanisms in a 2-bit SONOS type flash EEPROM cell with hot electron programming and hot hole erase are… 
Highly Cited
2000
Highly Cited
2000
A 60 MHz 240 mW MPEG-4 video-phone LSI with 16 Mb embedded DRAM
A 240 mW single-chip MPEG-4 video-phone LSI with a 16 Mb embedded DRAM is fabricated in a 0.25 /spl mu/m CMOS, triple-well, quad… 
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