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Full custom
Known as:
Full-custom
Full-custom design is a methodology for designing integrated circuits by specifying the layout of each individual transistor and the interconnections…
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Related topics
Related topics
12 relations
Application-specific integrated circuit
Electronic design automation
Gate array
Integrated circuit
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Edge-Directed Hardware Architecture for Real-Time Disparity Map Computation
Christos Ttofis
,
Stavros Hadjitheophanous
,
A. Georghiades
,
T. Theocharides
IEEE transactions on computers
2013
Corpus ID: 29835928
Stereo Vision, a technique aimed at inferring depth information from stereo images, has been used in a wide range of computer…
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2011
2011
A 3D Network-on-Chip for stacked-die transactional chip multiprocessors using Through Silicon Vias
Sumeet S. Kumar
,
R. van Leuken
International Conference on Design & Technology…
2011
Corpus ID: 15618233
Effective utilization of computing power offered by modern chip multiprocessors (CMP) depends on the design and performance of…
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2010
2010
Practical completion detection for 2-of-N delay-insensitive codes
Marco Cannizzaro
,
Weiwei Jiang
,
S. Nowick
IEEE International Conference on Computer Design
2010
Corpus ID: 9245594
There is increasing interest in using m-of-n delay-insensitive codes for robust asynchronous global communication, to support the…
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2008
2008
Information Leakage of Flip-Flops in DPA-Resistant Logic Styles
A. Moradi
,
T. Eisenbarth
,
+4 authors
M. Salmasizadeh
IACR Cryptology ePrint Archive
2008
Corpus ID: 16194387
This contribution discusses the information leakage of flipflops for different DPA-resistant logic styles. We show that many of…
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Highly Cited
2006
Highly Cited
2006
A design flow for configurable embedded processors based on optimized instruction set extension synthesis
R. Leupers
,
K. Karuri
,
S. Kraemer
,
Manish Pandey
Proceedings of the Design Automation & Test in…
2006
Corpus ID: 7572790
Design tools for application specific instruction set processors (ASIPs) are an important discipline in systems-level design for…
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2005
2005
Hardware factorization based on elliptic curve method
M. Simka
,
J. Pelzl
,
+5 authors
V. Fischer
IEEE Symposium on Field-Programmable Custom…
2005
Corpus ID: 14597126
The security of the most popular asymmetric cryptographic scheme RSA depends on the hardness of factoring large numbers. The best…
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2005
2005
Ultra Low-Power Neural Inspired Addition: When Serial Might Outperform Parallel Architectures
Valeriu Beiu
,
A. Djupdal
,
S. Aunet
International Work-Conference on Artificial and…
2005
Corpus ID: 12102778
In this paper we analyse a serial (ripple carry) and a parallel (Kogge-Stone) adder when operating in subthreshold at 100nm and…
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Highly Cited
2004
Highly Cited
2004
Transaction level modeling: flows and use models
A. Donlin
International Conference on Hardware/Software…
2004
Corpus ID: 848364
Transaction-level models (TLMs) address the problems of designing increasingly complex systems by raising the level of design…
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Highly Cited
2002
Highly Cited
2002
A Hardware-Software Real-Time Operating System Framework for SoCs
V. Mooney
,
D. Blough
IEEE Design & Test of Computers
2002
Corpus ID: 206458727
The /spl delta/ framework for RTOS-SoC codesign helps designers simultaneously build a SoC or platform-ASIC architecture and a…
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1999
1999
CryptoBooster: A Reconfigurable and Modular Cryptographic Coprocessor
E. Mosanya
,
C. Teuscher
,
H. F. Restrepo
,
P. Galley
,
E. Sanchez
Workshop on Cryptographic Hardware and Embedded…
1999
Corpus ID: 5776857
The CryptoBooster is a modular and reconfigurable cryptographic coprocessor that takes full advantage of current high-performance…
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