A design flow for configurable embedded processors based on optimized instruction set extension synthesis

@article{Leupers2006ADF,
  title={A design flow for configurable embedded processors based on optimized instruction set extension synthesis},
  author={Rainer Leupers and Kingshuk Karuri and Stefan Kraemer and M. Pandey},
  journal={Proceedings of the Design Automation & Test in Europe Conference},
  year={2006},
  volume={1},
  pages={6 pp.-}
}
Design tools for application specific instruction set processors (ASIPs) are an important discipline in systems-level design for wireless communications and other embedded application areas. Some ASIPs are still designed completely from scratch to meet extreme efficiency demands. However, there is also a trend, towards use of partially predefined, configurable RISC-like embedded processor cores that can be quickly tuned to given applications by means of instruction set extension (ISE… CONTINUE READING

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