Formal equivalence checking process is a part of electronic design automation (EDA), commonly used during the development of digital integratedâ€¦Â (More)

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2013

2013

- Carlos Ivan Castro Marquez, Marius Strum, Wang Jiang Chau
- 2013 14th Latin American Test Workshop - LATW
- 2013

Digital applications complexity makes it harder every day to discover and debug behavioral inconsistencies at register transferâ€¦Â (More)

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2013

2013

- Rahul Sharma, Eric Schkufza, Berkeley R. Churchill, Alexander Aiken
- OOPSLA
- 2013

We present a data driven algorithm for equivalence checking of two loops. The algorithm infers simulation relations using dataâ€¦Â (More)

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2010

2010

Formal Equivalence Checking (FEC) is a technique that formally proves the equivalence of a schematics implementation against aâ€¦Â (More)

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2007

2007

- Xiushan Feng
- 2007

Ever-growing complexity is forcing logic design to move above the register transfer level (RTL). For example, functionalâ€¦Â (More)

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Review

2005

Review

2005

- Alfred KÃ¶lbl, Yuan Lu, Anmol Mathur
- ICCAD-2005. IEEE/ACM International Conference onâ€¦
- 2005

A rigorous system-level model (SLM) for a hardware design project is extremely important, often critical. Such a functional modelâ€¦Â (More)

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Highly Cited

2002

Highly Cited

2002

- Andreas Kuehlmann, Viresh Paruthi, Florian Krohm, Malay K. Ganai
- IEEE Trans. on CAD of Integrated Circuits andâ€¦
- 2002

Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficientâ€¦Â (More)

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2001

2001

- Gerd Ritter
- 2001

A new approach to sequential verification of designs at different levels of abstraction by symbolic simulation is proposed. Theâ€¦Â (More)

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2001

2001

- Jiunn-Chern Chen, Yirng-An Chen
- ASP-DAC
- 2001

In this paper, we address on equivalence checking of integer multipliers, especially for the multipliers without structureâ€¦Â (More)

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Highly Cited

2000

Highly Cited

2000

- C. A. J. van Eijk
- IEEE Trans. on CAD of Integrated Circuits andâ€¦
- 2000

Checking the functional equivalence of sequential circuits is an important practical problem. Because general algorithms forâ€¦Â (More)

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Highly Cited

1997

Highly Cited

1997

- Andreas Kuehlmann, Florian Krohm
- DAC
- 1997

This paper presents a verification technique which isspecifically targeted to formally comparing large combinational circuitsâ€¦Â (More)

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