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Floorplan (microelectronics)

Known as: Floor planning, Floorplan (integrated circuits), Floorplanning 
In electronic design automation, a floorplan of an integrated circuit is a schematic representation of tentative placement of its major functional… 
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Related topics

Related topics

17 relations
Arithmetic logic unitBarrel shifterBinary treeCPU cache

Broader (1)

Combinatorial optimization

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
Floorplanning Considering IR Drop in Multiple Supply Voltages Island Designs
Voltage island has become a very effective design style for power saving in low-power design. However, the new design style also… 
2009
2009
Multicore parallel min-cost flow algorithm for CAD applications
Computational complexity has been the primary challenge of many VLSI CAD applications. The emerging multicore and many-core… 
2008
2008
Hybrid Architecture of Genetic Algorithm and Simulated Annealing
This paper discusses novel dedicated hardware architecture for hybrid optimization based on Genetic algorithm (GA) and Simulated… 
2006
2006
A Revisit to Floorplan Optimization by Lagrangian Relaxation
With the advent of deep sub-micron (DSM) era, floorplanning has become increasingly important in physical design process. In this… 
2005
2005
Incremental exploration of the combined physical and behavioral design space
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level… 
2004
2004
Simultaneous scheduling, binding and layer assignment for synthesis of vertically integrated 3D systems
Three-dimensional vertically integrated systems allow active devices to be placed on multiple device layers. In recent years, a… 
1997
1997
Regular datapaths on field programmable gate arrays
Field-Programmable Gate Arrays (FPGAs) are a recent kind of programmable logic device. They allow the implementation of… 
1996
1996
Hybrid floorplanning based on partial clustering and module restructuring
In this paper, we propose a hybrid floorplanning methodology. Two hierarchical strategies for avoiding local optima during… 
Highly Cited
1992
Highly Cited
1992
Anatomy of a Silicon Compiler
1. Introduction and History R.W. Brodersen. Part I: Framework and Design Entry. 2. The OCT Data Manager R. Spickelmier, B.C… 
1989
1989
An analytical approach to floorplanning for hierarchical building blocks layout [VLSI]
  • C. YingJ.S.L. Wong
  • IEEE Trans. Comput. Aided Des. Integr. Circuits…
  • 1989
  • Corpus ID: 40717447
An analytical approach for the floorplanning of rectangular blocks with constraints on their connection and dimensions that… 
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