Skip to search formSkip to main contentSkip to account menu

Domino logic

Known as: Domino (disambiguation) 
Domino logic is a CMOS-based evolution of the dynamic logic techniques based on either PMOS or NMOS transistors. It allows a rail-to-rail logic swing… 
Wikipedia (opens in a new tab)

Related topics

Related topics

13 relations
Bellmac 32CMOSCharge sharingDepletion-load NMOS logic

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
Low power dynamic logic circuit design using a pseudo dynamic buffer
Highly Cited
2004
Highly Cited
2004
Sleep switch dual threshold Voltage domino logic with reduced standby leakage current
A circuit technique is presented for reducing the subthreshold leakage energy consumption of domino logic circuits. Sleep switch… 
2003
2003
Reduced dynamic swing domino logic
A new reduced-swing domino logic technique is presented which provides significantly lower power dissipation as compared to… 
2001
2001
Crosstalk noise minimization in domino logic design
  • Ki-Wook KimS. Kang
  • IEEE Trans. Comput. Aided Des. Integr. Circuits…
  • 2001
  • Corpus ID: 46490262
Based on the new concept of crosstalk immunity set (CIS), procedures to minimize capacitive crosscoupling effects are developed… 
Highly Cited
1999
Highly Cited
1999
Dual threshold voltage domino logic
  • James Kao
  • Proceedings of the 25th European Solid-State…
  • 1999
  • Corpus ID: 11822613
Dual threshold voltage (DVT) domino logic utilizes dual V<inf>t</inf>'s to provide the performance equivalent of a purely low V… 
1998
1998
Technology mapping for domino logic
Domino logic is a popular configuration for implementing high-speed circuits. An algorithm for domino logic mapping, under a… 
1998
1998
Domino logic synthesis using complex static gates
We address the synthesis of the most general form of a domino gate (dynamic-static domino), which consists of the pairing of a… 
Highly Cited
1996
Highly Cited
1996
Clock-delayed domino for adder and combinational logic design
  • G. YeeC. Sechen
  • Proceedings International Conference on Computer…
  • 1996
  • Corpus ID: 34682717
An innovative dynamic logic family, clock-delayed (CD) domino, was developed to provide gates with either inverting or non… 
Highly Cited
1986
Highly Cited
1986
Design-performance trade-offs in CMOS-domino logic
The authors present a study of the charge-sharing problem and its effect on the performance of CMOS-domino logic. Several… 
1985
1985
Analysis and design optimization of domino CMOS logic with application to standard cells
The application of domino logic to standard-cell-based design is discussed. Domino cells are compatible with static cells and can… 
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)