Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 237,159,863 papers from all fields of science
Search
Sign In
Create Free Account
Design flow (EDA)
Known as:
Design flows (EDA)
Design flows are the explicit combination of electronic design automation tools to accomplish the design of an integrated circuit. Moore's law has…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
18 relations
Alberto Sangiovanni-Vincentelli
Asynchronous system
Clock signal
Design Automation Conference
Expand
Broader (1)
Digital electronics
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
An FPGA-based prototyping method for verification, characterization and optimization of LDPC error correction systems
P. Sakellariou
,
I. Tsatsaragkos
,
N. Kanistras
,
A. Mahdi
,
Vassilis Paliouras
International Conference / Workshop on Embedded…
2012
Corpus ID: 11257825
This paper introduces a methodology for forward error correction (FEC) architectures prototyping, oriented to system verification…
Expand
2009
2009
An End-to-End Design Flow for Automated Instruction Set Extension and Complex Instruction Selection Based on GCC
Oscar Almer
,
R. Bennett
,
+5 authors
N. Topham
2009
Corpus ID: 9433953
Extensible processors are application-specific instruction set processors (ASIPs) that allow for customisation through user…
Expand
Review
2009
Review
2009
Cholesky decomposition using fused datapath synthesis
S. Demirsoy
,
M. Langhammer
Symposium on Field Programmable Gate Arrays
2009
Corpus ID: 590420
In this paper we present an implementation of a Cholesky decomposition core, with IEEE754 single precision arithmetic. The…
Expand
2006
2006
Low-leakage SRAM design with dual V/sub t/ transistors
B. Amelifard
,
F. Fallah
,
Massoud Pedram
IEEE International Symposium on Quality…
2006
Corpus ID: 10730604
This paper presents a method based on dual threshold voltage assignment to reduce the leakage power dissipation of SRAMs while…
Expand
2005
2005
Using Matlab and Simulink in a SystemC Verification Environment
Jean-François Boland
,
C. Thibeault
,
Z. Zilic
2005
Corpus ID: 221240797
Functional verification is a major bottleneck in today’s design flow. Expensive and time consuming, the process of verifying…
Expand
2001
2001
An efficient and precise design method to optimize device areas in mismatch and flicker-noise sensitive analog circuits
C. Paulus
,
R. Brederlow
,
U. Kleine
,
R. Thewes
ICECS . 8th IEEE International Conference on…
2001
Corpus ID: 60894846
A new method is presented which allows us to optimize active device area in complex mismatch- and 1/f-noise-sensitive analog…
Expand
2000
2000
Using SDL for implementing a wireless medium access control protocol
Marko Htiniktinen
,
J. Knuutila
,
T. Hämäläinen
,
J. Saarinen
Proceedings International Symposium on Multimedia…
2000
Corpus ID: 21656770
Specification and Description Language (SDL) is a high abstraction level system design language with a clear graphical notation…
Expand
Highly Cited
2000
Highly Cited
2000
Cross-talk immune VLSI design using a network of PLAs embedded in a regular layout fabric
S. Khatri
,
R. Brayton
,
A. Sangiovanni-Vincentelli
IEEE/ACM International Conference on Computer…
2000
Corpus ID: 13984468
We present a VLSI design methodology to address the cross-talk problem, which is becoming increasingly important in Deep Sub…
Expand
2000
2000
Top-Down Design of MEMS
G. Fedder
2000
Corpus ID: 41386964
A top-down design flow for suspended MEMS is described, starting with schematic capture of a design topology, followed by…
Expand
1996
1996
A methodology for rapid analysis and optimization of embedded systems
H. Eikerling
,
W. Hardt
,
J. Gerlach
,
W. Rosenstiel
Proceedings IEEE Symposium and Workshop on…
1996
Corpus ID: 18663288
The paper describes an environment for the rapid analysis, synthesis and optimization of embedded systems. Since the…
Expand