Skip to search formSkip to main contentSkip to account menu

Design flow (EDA)

Known as: Design flows (EDA) 
Design flows are the explicit combination of electronic design automation tools to accomplish the design of an integrated circuit. Moore's law has… 
Wikipedia (opens in a new tab)

Related topics

Related topics

18 relations
Alberto Sangiovanni-VincentelliAsynchronous systemClock signalDesign Automation Conference

Broader (1)

Digital electronics

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
A Multi-Granularity Power Modeling Methodology for Embedded Processors
With power becoming a major constraint for multiprocessor embedded systems, it is becoming important for designers to… 
2011
2011
Automated Resource-Aware Floorplanning of Reconfigurable Areas in Partially-Reconfigurable FPGA Systems
The floor planning activity is a key step in the design of systems on FPGAs, but the approaches available today rarely consider… 
Highly Cited
2010
Highly Cited
2010
Post-placement power optimization with multi-bit flip-flops
Optimization for power is always one of the most important design objectives in modern nanometer IC design. Recent studies have… 
2010
2010
Design of High-Throughput Fully Parallel LDPC Decoders Based on Wire Partitioning
We present a method to design high-throughput fully parallel low-density parity-check (LDPC) decoders. With our method, a decoder… 
Highly Cited
2010
Highly Cited
2010
A predictable multiprocessor desgin flow for streaming applications with dynamic behaviour
—The design of new embedded systems is getting more and more complex as more functionality is integrated into these systems. To… 
2008
2008
CHIPS: Custom Hardware Instruction Processor Synthesis
This paper describes an integer-linear-programming (ILP)-based system called custom hardware instruction processor synthesis… 
Highly Cited
2007
Highly Cited
2007
Implementation of a Virtual Internal Configuration Access Port (JCAP) for Enabling Partial Self-Reconfiguration on Xilinx Spartan III FPGAs
The exploitation of dynamic and partial hardware reconfiguration on FPGAs is currently being investigated in various research… 
2006
2006
NoC monitoring: impact on the design flow
Networks-on-chip (NoCs) are a scalable interconnects solution to large scale multiprocessor systems on chip and are rapidly… 
Review
2001
Review
2001
Low-power design for embedded processors
Minimization of power consumption in portable and battery powered embedded systems has become an important aspect of processor… 
2001
2001
Managing dynamic reconfiguration overhead in systems-on-a-chip design using reconfigurable datapaths and optimized interconnection networks
This research examines the role of dynamically reconfigurable logic in systems-on-a-chip (SoC) design. Specifically we study the… 
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)