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Carry-save adder
Known as:
CSA
, Carry save adder
A carry-save adder is a type of digital adder, used in computer microarchitecture to compute the sum of three or more n-bit numbers in binary. It…
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Related topics
Related topics
11 relations
Adder (electronics)
Adder–subtractor
Carry (arithmetic)
Carry-lookahead adder
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
Technological solutions for throughput improvement of a Secure Hash Algorithm-256 engine
Flavius Oprițoiu
,
Sorin Liviu Jurj
,
M. Vladutiu
International Symposium for Design and Technology…
2017
Corpus ID: 19509498
This article describes a set of techniques for improving the performance of an Secure Hash Algorithm 256 (SHA-256) hardware…
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2014
2014
Performance of FIR Filter with Wallace Multiplier over FIR filter with Truncated Multiplier
M. Gnanasekaran
,
Dr. M. Manikandan
,
Research Scholar
2014
Corpus ID: 15782347
Performance analysis of finite impulse response (FIR) designs are presented by the concept of modified Wallace multipliers .This…
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2014
2014
OPTIMIZING THE POWER USING FUSED ADD MULTIPLIER
Dr. C.Venkatesh
,
P. Student
2014
Corpus ID: 212480693
– Many Digital Signal Processing (DSP) applications carry out a large number of complex arithmetic operations. Multiplier take…
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2014
2014
Analysis of Low Power, Area- Efficient and High Speed Multiplier using Fast Adder
Krishna Naik Dungavath
,
V. Vijayalakshmi
,
D. Scholar
2014
Corpus ID: 62275292
In this paper the performance of different types of adders are analysed. And carry select adder (CSLA) is the lowest delay…
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2014
2014
Design of a High Speed FIR Filter on FPGA by Using DA-OBC Algorithm
Vijay Kumar Ch
,
Leelakrishna Muthyala
2014
Corpus ID: 212551077
: The main objective of the project is to implement FIR filter on FPGA using Distributed Arithmetic-Offset Binary Coding (DA-OBC…
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2011
2011
Optimal and Heuristic Scheduling Algorithms for Asynchronous High-Level Synthesis
Nikolaos Andrikos
,
L. Lavagno
International Conference on Advanced Computer…
2011
Corpus ID: 20269644
High-level synthesis is becoming more and more popular in the recent years, since it increases the designers' productivity and…
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2010
2010
Design By Analysis as an Alternative to CSA B620 and 49CFR Structural Requirements for Pressurized Highway Tanks
Zhanghai Wang
,
Brad Hurst Court
,
Katy Texas
,
Daryl Bast
2010
Corpus ID: 110407351
Current pressurized highway tank and its support designs must be substantiated using the design by formula (DBF) methods…
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2007
2007
Design and Performance testing of Arithmetic Operators Library for Cryptographic Applications
E.-H.Y. Wajih
,
Z. Medien
,
Mohsen Machhout
,
B. Belgacem
,
T. Rached
2007
Corpus ID: 13054986
The main applications of the arithmetic operators are met in the fields of communication’s security, communication’s integrity…
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2006
2006
A ONE-STEP MODULO 2N+1 ADDER BASED ON DOUBLE-LSB REPRESENTATION OF RESIDUES
Jaberipur Ghassem
2006
Corpus ID: 15625425
Efficient modulo 2±1 adders are desirable for computer arithmetic units based on residue number systems (RNS) with the popular…
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2006
2006
A Design of Modular Multiplier Based on Improved Multi-Precision Carry Save Adder
Dae-Young Kim
,
Jun-Yong Lee
2006
Corpus ID: 63900649
The method of implementing a modular multiplier for Montgomery multiplication by using an adder depends on a selected adder. When…
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