Booth's multiplication algorithm

Known as: Booth's notation, Booth algorithm, Booth recoding 
Booth's multiplication algorithm is a multiplication algorithm that multiplies two signed binary numbers in two's complement notation. The algorithm… (More)
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Papers overview

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Review
2017
Review
2017
Often as the most important arithmetic modules in a processor, adders, multipliers, and dividers determine the performance and… (More)
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Highly Cited
2015
Highly Cited
2015
  • 2015
Bit is added to the left of the partial product using sign extension.products required to half that required by a simple add and… (More)
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Highly Cited
2011
Highly Cited
2011
The fixed-width multiplier is attractive to many multimedia and digital signal processing systems which are desirable to maintain… (More)
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2011
2011
A new architecture, namely, Multiplier-andaccumulator (MAC) based Radix-4 Booth Multiplication Algorithm for high-speed… (More)
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Highly Cited
2010
Highly Cited
2010
In this paper, we proposed a new architecture of multiplier-and-accumulator (MAC) for high-speed arithmetic. By combining… (More)
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2005
2005
The main back-bone operation in elliptic curve cryptosystems is scalar point multiplication. The most frequently used method… (More)
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2004
2004
One of the main reasons for using asynchronous design is that it offers the opportunity to exploit the data-dependent latency of… (More)
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Highly Cited
2004
Highly Cited
2004
This paper presents an error compensation method for a modified Booth fixed-width multiplier that receives a W-bit input and… (More)
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Highly Cited
2000
Highly Cited
2000
ÐThis paper presents a design methodology for high-speed Booth encoded parallel multiplier. For partial product generation, we… (More)
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Highly Cited
1999
Highly Cited
1999
New VLSI circuit architectures for addition and multiplication modulo(2 1) and(2 + 1) are proposed that allow the implementation… (More)
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