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Binary multiplier
Known as:
Multiplication ALU
, Multiplier
, Hardware multiply
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A binary multiplier is an electronic circuit used in digital electronics, such as a computer, to multiply two binary numbers. It is built using…
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Related topics
Related topics
31 relations
36-bit
Ancient Egyptian multiplication
Approximate computing
Arithmetic logic unit
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2018
2018
High-radix complex number multiplier implementations on FPGA
A. Saari
2018
Corpus ID: 62825013
Multiplication is often the bottleneck in digital signal processing applications. Therefore, faster and more compact hardware…
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2009
2009
Fault Tolerent Context Aware Mobile Computing
Ahmad Hassan Afridi
,
Muhammad Ali
International Conference on Future Computer and…
2009
Corpus ID: 15707477
Fault tolerance is the main focus of design of new paradigms like context aware mobile computing. In situations where computing…
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2007
2007
Implementation of Digital Filters Using Microcontrollers
Ahmed M. A. Ali
,
S. Sulaiman
2007
Corpus ID: 62378465
Applications involving processing of data from external analog sources (sensors) often require some kind of digital filtering of…
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2004
2004
Implementing FFT in an FPGA Co-Processor
Sheac Yee Lim
,
A. Crosland
2004
Corpus ID: 14513529
The Fast Fourier Transform (FFT) is a computationally intensive digital signal processing (DSP) function widely used in…
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2004
2004
Digital FIR Filter Design Using the MSP430F16x
Steven W. Smith
2004
Corpus ID: 15563855
This application report describes an FIR filter implementation using the MSP430F16x and the MSP430F161x family devices. The…
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1994
1994
Multiplier-free IIR filter realization using periodically time-varying state-space structure. I. Structure and design
S. Ghanekar
,
S. Tantaratana
,
L. Franks
IEEE Transactions on Signal Processing
1994
Corpus ID: 1290489
A multiplier-free realization for IIR filters is proposed. A given target IIR filter is implemented in cascade or parallel form…
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1992
1992
A programmable digital filter IC employing multiple processors on a single chip
A. Kwentus
,
M. J. Werter
,
A. Willson
IEEE Trans. Circuits Syst. Video Technol.
1992
Corpus ID: 28777266
A programmable general-purpose digital filter IC that employs multiple processing units on a single chip is described. The…
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1992
1992
A new DSP-oriented algorithm for calculation of the square root using a nonlinear digital filter
N. Mikami
,
Masaki Kobayashi
,
Y. Yokoyama
IEEE Transactions on Signal Processing
1992
Corpus ID: 41270941
A high-speed algorithm for calculating the square root is proposed. This algorithm, which can be regarded as calculation of the…
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1982
1982
A high-speed LSI GaAs 8x8 bit parallel multiplier
F. S. Lee
,
G. Kaelin
,
+6 authors
R. Eden
IEEE Journal of Solid-State Circuits
1982
Corpus ID: 22371267
Multiplication is frequently the speed-limiting function in digital signal processing systems. High-speed hardware multiplier ICs…
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1980
1980
A High-Speed Microprogrammable Digital Signal Processor Employing Distributed Arithmetic
J. Zeman
,
H. Nagle
IEEE Journal of Solid-State Circuits
1980
Corpus ID: 47332901
This paper describes a gesteral-purpose digital-signal processor which is constructed with 4 bit bipolar microprocessor slices…
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