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Translation lookaside buffer
Known as:
ITLB
, TLB
, Translation-lookaside buffer
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A Translation lookaside buffer (TLB) is a memory cache that is used to reduce the time taken to access a user memory location. It is a part of the…
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Related topics
Related topics
50 relations
AMD 10h
ARM architecture
Alpha 21064
Athlon
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Broader (2)
Central processing unit
Computer memory
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2018
2018
Translation Lookaside buffer on the 65-NM STG dice hardened elements
Y. A. Vladimir Stenin
,
V. Antonyuk
,
V. V. Katunin
,
V. Stepanov
2018
Corpus ID: 56278408
This paper presents the design of hardened translation lookaside buffer based on Spaced Transistor Groups (STG) DICE cells in 65…
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2015
2015
Danger Theory Based Load Balancing (DTLB) Algorithm for Cloud Computing
Isha Dubey
,
P. Saurabh
2015
Corpus ID: 16526505
Cloud computing is one of the growing technology in computer science and an established way for sharing and accessing resources…
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2010
2010
Comparing Approaches to Virtualized Page Translation in Modern VMMs
C. Bae
,
J. Lange
,
P. Dinda
2010
Corpus ID: 7916433
Virtual machine monitors for modern x86 processors can use a variety of approaches to virtualize address translation. These…
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2006
2006
Inline Path Characteristic Estimation to Improve TCP Performance in High Bandwidth-Delay Networks
C. Marcondes
,
A. Persson
,
M. Sanadidi
,
M. Gerla
2006
Corpus ID: 2405749
We present a measurement study of TCPW BBE (Bandwidth and Buffer Estimations) [5] and associated path characteristics estimation…
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2006
2006
Vegetative Environmental Buffers to Mitigate Odor and Aerosol Pollutants Emitted from Poultry Production Sites
J. Colletti
,
S. Hoff
,
Jan R. Thompson
,
J. Tyndall
2006
Corpus ID: 10976567
Joe Colletti, Steven Hoff, Janette Thompson and John Tyndall Iowa State University Abstract In Iowa at a commercial poultry…
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2005
2005
Scalable Cross-Architecture Predictions of Memory Hierarchy Response for Scientific Applications
Gabriel Marin mgabi
2005
Corpus ID: 14093250
The gap between processor and memory speeds has been growing with each new generation of microprocessors. As a result, memory…
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2000
2000
Quantifying the SMT layout overhead-does SMT pull its weight?
J. Burns
,
J. Gaudiot
Proceedings Sixth International Symposium on High…
2000
Corpus ID: 42738138
Simultaneous Multi-Threading (SMT) is a hardware technique that increases processor throughput by issuing instructions…
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2000
2000
Buffer Queries∗
P. F. Chan
2000
Corpus ID: 206742093
A class of commonly asked queries in a spatial database is known as buffer queries. An example of such a query is to “find house…
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1996
1996
High Performance I/O Design in the AlphaServer 4100 Symmetric Multiprocessing System
Samuel H. Duncan
,
Craig D. Keefer
,
Thomas A. McLaughlin
Digital technical journal of Digital Equipment…
1996
Corpus ID: 14594080
ing system based on the Alpha 21164 64-bit RISC microprocessor. This midrange system supports one to four CPUs, one to four 64…
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1988
1988
The economics of storing a non-storable commodity
G. V. van Kooten
,
A. Schmitz
,
W. Furtan
1988
Corpus ID: 56117212
Commodity stabilization under a buffer stock and under a buffer fund are compared. In the c ase where a good cannot be physically…
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