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Transaction-level modeling
Known as:
Transaction-level modelling
, Transaction level modeling
, Transaction level modelling
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Transaction-level modeling (TLM) is a high-level approach to modeling digital systems where details of communication among modules are separated from…
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Related topics
Related topics
15 relations
Electronic design automation
Electronic system-level design and verification
Event loop
Event-driven programming
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2009
2009
Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus models from a formal model
C. Lo
,
R. Tsay
Asia and South Pacific Design Automation…
2009
Corpus ID: 7956632
This paper proposes the first automatic approach to simultaneously generate Cycle Accurate and Cycle Count Accurate transaction…
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2009
2009
Efficient Parallel Transaction Level Simulation by Exploiting Temporal Decoupling
Rauf Salimi Khaligh
,
M. Radetzki
International Conference on Exploring Services…
2009
Corpus ID: 1246324
In recent years, transaction level modeling (TLM) has enabled designers to simulate complex embedded systems and SoCs, orders of…
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2006
2006
Transaction Level Modeling of Computation
R. Dömer
2006
Corpus ID: 17889820
The design of embedded computing systems faces great challenges due to the huge complexity of these systems. The design…
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2005
2005
On PSL Properties Re-use in SoC Design Flow Based on Transaction Level Modeling
N. Bombieri
,
A. Fedeli
,
F. Fummi
Sixth International Workshop on Microprocessor…
2005
Corpus ID: 18786399
In this paper the authors present some key concepts concerning the properties specification language (PSL) utilization in a…
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Highly Cited
2004
Highly Cited
2004
Transaction level modeling: flows and use models
A. Donlin
International Conference on Hardware/Software…
2004
Corpus ID: 848364
Transaction-level models (TLMs) address the problems of designing increasingly complex systems by raising the level of design…
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2004
2004
Workload simulation method for evaluation of application feasibility in a mobile multiprocessor platform
J. Kreku
,
Jani Penttilä
,
J. Kangas
,
J. Soininen
Euromicro Symposium on Digital System Design…
2004
Corpus ID: 2594025
Performance evaluation plays a critical role in the optimisation and validation of integrated application domain-specific…
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2003
2003
From VHDL register transfer level to SystemC transaction level modeling: a comparative case study
Ney Laert Vilar Calazans
,
E. I. Moreno
,
Fabiano Hessel
,
Vitor M. da Rosa
,
F. Moraes
,
E. Carara
16th Symposium on Integrated Circuits and Systems…
2003
Corpus ID: 16390809
Transaction level (TL) modeling is regarded today as the next step in the direction of complex integrated circuits and systems…
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2003
2003
RTOS scheduling in transaction level models
Haobo Yu
,
A. Gerstlauer
,
D. Gajski
First IEEE/ACM/IFIP International Conference on…
2003
Corpus ID: 5899719
Raising the level of abstraction in system design promises to enable faster exploration of the design space at early stages…
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Highly Cited
2003
Highly Cited
2003
Transaction-level models for AMBA bus architecture using SystemC 2.0 [SOC applications]
M. Caldari
,
Massimo Conti
,
M. Coppola
,
S. Curaba
,
L. Pieralisi
,
C. Turchetti
Design, Automation and Test in Europe Conference…
2003
Corpus ID: 9531796
The concept of a SOC platform architecture introduces the concept of a communication infrastructure. In the transaction-level, a…
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2003
2003
Using transactional level models in a SoC design flow
A. Clouard
,
K. Jain
,
F. Ghenassia
,
L. Maillet-Contoz
,
Jean-Philippe Strassen
2003
Corpus ID: 59658619
Embedded software accounts for more than half of the total development time of a system on a chip (SoC). The complexity of the…
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