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Electronic system-level design and verification

Known as: ESL Design, Electronic system level design, Electronic system-level 
Electronic system level (ESL) design and verification is an emerging electronic design methodology that focuses primarily on the higher abstraction… 
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Papers overview

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2011
2011
With power becoming a major constraint for multiprocessor embedded systems, it is becoming important for designers to… 
2009
2009
This book arises from experience the authors have gained from years of work as industry practitioners in the field of Electronic… 
2006
2006
Safety is inherently a systems-level engineering challenge. The system design determines the placement of the storage system, the… 
2006
2006
Transaction level modeling (TLM) is becoming a usual practice for simplifying system-level design and architecture exploration… 
2006
2006
Recent research has shown that FPGAs have true potential to speedup demanding applications even further than what state-of-the… 
2004
2004
Workload design is a well recognized problem in the domain of microprocessor design. Different program characteristics that… 
Highly Cited
2003
Highly Cited
2003
Platform-based design of SoC, as practiced by Texas Instruments, has two key characteristics: platforms are defined… 
Highly Cited
2000
Highly Cited
2000
In this paper we propose a system-level design environment, aimed at System-on-Chip (SOC) designs, including real-time embedded… 
2000
2000
The paper addresses embedded software performance estimation. Known approaches use either behavioral simulation with timing…