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Test vector generator
Test vector generator is a program used to automatically generate test data for use in automated testing of software. This can generate many…
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Software testing
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Test data
Test vector
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
Detection and Identification of Gate Faults in Reversible Circuit
Bappaditya Mondal
,
Chandan Bandyopadhyay
,
Anirban Bhattacharjee
,
H. Rahaman
Lecture Notes in Electrical Engineering
2019
Corpus ID: 201135127
In recent time, efficient implementation of reversible logic circuits has come out as an important research area before the…
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2018
2018
Assisted Coverage
A. Nellis
,
Pascal Kesseli
,
P. Conmy
,
D. Kroening
,
P. Schrammel
,
Michael Tautschnig
2018
Corpus ID: 4650675
The malfunction of safety-critical systems may cause damage to people and the environment. Software within those systems is…
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2015
2015
Oscillation Based Testing for Low Voltage Two Stage Operational Transconductance Amplifier
J. Kaur
2015
Corpus ID: 212527528
The paper describes the design for testability (DFT) of low voltage two stage operational transconductance amplifiers based on…
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2011
2011
Controllable test vector generator based on linear feedback shift register
刘震
,
杨会平
,
田书林
,
龙兵
2011
Corpus ID: 65052938
The invention discloses a controllable test vector generator based on a linear feedback shift register (LFSR). The controllable…
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2009
2009
A low power consumption BIST testing technology based on heavy input
Yi Wang
3rd International Conference on Anti…
2009
Corpus ID: 37727150
This paper introduces a lower power built-in-self-test technology, which can effectively reduce the average power consumption of…
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2006
2006
D-Scene ~ Bridging from CAD to ATE over the VLSI ravine
M. Chester
2006
Corpus ID: 12963734
Perhaps the most significant trend in the automated test equipment industry is the move toward fully integrating ATE into the CAD…
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2005
2005
BIST Test Vector Generator for I_(DDT) Testing
K. Ji
2005
Corpus ID: 63701373
To test the open-circuit failures in CMOS circuits usually needs to use test vector pairs.Built-in self-test(BIST)is used as an…
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2004
2004
Testing layered interconnection networks
Bin Liu
,
F. Lombardi
,
N. Park
,
Minsu Choi
IEEE transactions on computers
2004
Corpus ID: 2263431
We present an approach for fault detection in layered interconnection networks (LINs). An LIN is a generalized multistage…
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2004
2004
Using Model-Based Testing to Assess Smart Card Interoperability Conformance
M. Blackburn
,
R. Chandramouli
INTERNATIONAL CONFERENCE ON COMMUNICATION CONTROL…
2004
Corpus ID: 50626135
Smart cards are being used to provide security for many types of applications, and with an estimated market of 3.3 billion in…
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1995
1995
Mixed deterministic and pseudorandom test vector generator based on cellular automata structures
S. Boubezari
,
B. Kaminska
International Symposium on Circuits and Systems
1995
Corpus ID: 6488604
This paper proposes a new approach for designing a cost-effective on-chip Built-in Self-Test (BIST) generator through the use of…
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