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Test vector
In computer science and engineering, a test vector is a set of inputs provided to a system in order to test that system.
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Related topics
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9 relations
All-pairs testing
Boundary-value analysis
Computable function
Computer science
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Broader (1)
Computer engineering
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
FPGA Implementation of 1D and 2D DWT Architecture using Modified Lifting Scheme
M. Nagabushanam
,
S. Ramachandran
,
P. Kumar
2013
Corpus ID: 7064086
Image compression is one of the prominent topics in image processing that plays a very important role in reducing image size for…
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2005
2005
A vector-based approach for power supply noise analysis in test compaction
Jing Wang
,
Ziding Yue
,
Xiang Lu
,
Wangqi Qiu
,
Weiping Shi
,
D. Walker
IEEE International Conference on Test, .
2005
Corpus ID: 13170371
Excessive power supply noise can lead to overkill during delay test. A static test vector compaction solution is described to…
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2004
2004
An efficient test vector ordering method for low power testing
X. Kavousianos
,
D. Bakalis
,
M. Bellos
,
D. Nikolos
IEEE Computer Society Annual Symposium on VLSI
2004
Corpus ID: 29042909
This paper presents a novel test vector ordering method for average power consumption minimization. The proposed method orders…
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2003
2003
Deterministic test vector decompression in software using linear operations [SOC testing]
K. J. Balakrishnan
,
N. Touba
Proceedings. 21st VLSI Test Symposium, .
2003
Corpus ID: 14545239
A new software-based test vector compression technique is proposed for using an embedded processor to test the other components…
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2002
2002
IP for embedded diagnosis
S. Pateras
IEEE Design & Test of Computers
2002
Corpus ID: 31508763
An integrated BIST-based flow streamlines debugging and fault diagnosis of increasingly complex SoC devices. This methodology can…
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2000
2000
Estimation of Probability of Different Functional Faults Caused by Spot Defects in VLSI Circuits
M. Blyzniuk
,
W. Pleskacz
,
M. Lobur
,
W. Kuzmicz
2000
Corpus ID: 14549003
In this paper we consider practical approach for identification of types of functional faults caused by shorts in conductive…
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Highly Cited
1999
Highly Cited
1999
A test vector ordering technique for switching activity reduction during test operation
P. Girard
,
L. Guiller
,
C. Landrault
,
S. Pravossoudovitch
Proceedings Ninth Great Lakes Symposium on VLSI
1999
Corpus ID: 31534073
This paper considers the problem of testing VLSI integrated circuits without exceeding their power ratings during test. The…
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1997
1997
Using Partial Isolation Rings to Test Core-Based Designs
N. Touba
,
B. Pouya
IEEE Design & Test of Computers
1997
Corpus ID: 38063457
A partial isolation ring provides the same fault coverage as a full isolation ring but avoids adding multiplexers on critical…
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1995
1995
User application of statistical process monitor techniques to ASIC critical parameters
Alex M. Ijaz
,
E. Hnatek
International Test Conference
1995
Corpus ID: 26299060
The collection of meaningful data is important in understanding sources of variation in the IC manufacturing process, leading to…
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1992
1992
Robustsless Enhancement And Detection Threshold Reduction In ATPG For Gate Delay Faults
W. Mao
,
M. Ciletti
Proceedings International Test Conference
1992
Corpus ID: 29356816
In this paper, we introduce a new test generation algorithm for testing ate delay fault. The main new feature of the algoritfm is…
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