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Low Complexity Digit Serial Systolic Montgomery Multipliers for Special Class of ${\rm GF}(2^{m})$
This paper presents a digit-serial systolic multiplication architecture for all-one polynomials (AOP) over GF(2m) for efficient implementation of Montgomery Multiplication Algorithm suitable for cryptosystem. Expand
A novel droplet routing algorithm for digital microfluidic biochips
We propose a simple algorithm for concurrent path allocation to multiple droplets, based on the Soukup's routing algorithm, together with the use of stalling, and possible detouring of droplets in cases of contentions. Expand
Modeling and Analysis of Crosstalk Induced Effects in Multiwalled Carbon Nanotube Bundle Interconnects: An ABCD Parameter-Based Approach
In this paper, the crosstalk effects in both small and large diameter multiwalled carbon nanotube bundle interconnects (MWCNTs) for the future nanoscale integrated circuits are studied with the helpExpand
Comparative Performance Analysis of the Dielectrically Modulated Full- Gate and Short-Gate Tunnel FET-Based Biosensors
In this paper, a short-gate tunneling-field-effect-transistor (SG-TFET) structure has been investigated for the dielectrically modulated biosensing applications in comparison with a full-gateExpand
Unified Digit Serial Systolic Montgomery Multiplication Architecture for Special Classes of Polynomials over GF(2m)
This paper presents an unified digit-serial systolic multiplication architecture for all-one polynomials (AOP) and trinomial over GF (2m) for efficient implementation of Montgomery Multiplication (MM) algorithm suitable for cryptosystem. Expand
Effective fault detection and routing scheme for wireless sensor networks
We propose an energy efficient fault detection and routing scheme (EFDR) scheme to manage a large size WSN. Expand
A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines
This paper proposes an efficient optimization technique for MCT gate netlists with both positive and negative control lines, which is based on repeated applications of a small set of pairwise gate merging and replacement rules. Expand
Synthesis of online testable reversible circuit
This article presents a technique for online fault detection under single missing-gate fault (SMGF) model in reversible circuits. Expand
Exploiting Negative Control Lines in the Optimization of Reversible Circuits
The development of approaches for synthesis and optimization of reversible circuits received significant attention in the past. Expand
Generator for Test Set Construction of SMGF in Reversible Circuit by Boolean Difference Method
This work proposes an algorithm for deriving the test set for the detection of all single missing gate faults in a reversible circuit implemented with k-CNOT gates. Expand