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Systolic array

Known as: Array, SSA, Super systolic array 
In parallel computer architectures, a systolic array is a homogeneous network of tightly coupled data processing units (DPUs) called cells or nodes… Expand
Wikipedia

Related topics

Related topics

49 relations
Address spaceAlgorithmAnton (computer)Array data structure
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Broader (2)

Parallel computingReconfigurable computing

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2018
2018
PolySA: Polyhedral-Based Systolic Array Auto-Compilation
  • J. Cong, J. Wang
  • IEEE/ACM International Conference on Computer…
  • 2018
    • Corpus ID: 51997145
Automatic systolic array generation has long been an interesting topic due to the need to reduce the lengthy development cycles… Expand
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Highly Cited
2017
Highly Cited
2017
Automated systolic array architecture synthesis for high throughput CNN inference on FPGAs
Convolutional neural networks (CNNs) have been widely applied in many deep learning applications. In recent years, the FPGA… Expand
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Highly Cited
1989
Highly Cited
1989
A Systolic Array Optimizing Compiler
The Warp machine is a linear array of ten programmable processors and is capable of executing 100 million floating-point… Expand
Highly Cited
1987
Highly Cited
1987
LUSTRE: a declarative language for real-time programming
LUSTRE is a synchronous data-flow language for programming systems which interact with their environments in real-time. After an… Expand
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Highly Cited
1987
Highly Cited
1987
Programming for Parallelism
  • A. Karp
  • Computer
  • 1987
    • Corpus ID: 5979867
In the last few years we have seen an explosion in the interest in and availability of parallel processors and a corresponding… Expand
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Highly Cited
1986
Highly Cited
1986
Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays
A technique for partitioning and mapping algorithms into VLSI systolic arrays is presented in this paper. Algorithm partitioning… Expand
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Highly Cited
1985
Highly Cited
1985
The Design of Optimal Systolic Arrays
  • G. Li, B. Wah
  • IEEE Transactions on Computers
  • 1985
    • Corpus ID: 206623105
Conventional design of systolic arrays is based on the mapping of an algorithm onto an interconnection of processing elements in… Expand
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Highly Cited
1983
Highly Cited
1983
Recursive Least-Squares Minimization Using A Systolic Array
A systolic array for performing recursive least-squares minimization is desc/ performs an orthogonal triangularization of the… Expand
Highly Cited
1983
Highly Cited
1983
On the design of algorithms for VLSI systolic arrays
  • D. Moldovan
  • Proceedings of the IEEE
  • 1983
    • Corpus ID: 7517251
This paper is concerned with the mapping of cyclic loop algorithms into special-purpose VLSI arrays. The mapping procedure is… Expand
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Highly Cited
1982
Highly Cited
1982
Matrix Triangularization By Systolic Arrays
Given an n x p matrix X with p < n, matrix triangularization, or triangularization in short, is to determine an n x n nonsingular… Expand
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