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Systolic array
Known as:
Array
, SSA
, Super systolic array
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In parallel computer architectures, a systolic array is a homogeneous network of tightly coupled data processing units (DPUs) called cells or nodes…
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Related topics
Related topics
49 relations
Address space
Algorithm
Anton (computer)
Array data structure
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Broader (2)
Parallel computing
Reconfigurable computing
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2018
Highly Cited
2018
PolySA: Polyhedral-Based Systolic Array Auto-Compilation
J. Cong
,
Jie Wang
IEEE/ACM International Conference on Computer…
2018
Corpus ID: 51997145
Automatic systolic array generation has long been an interesting topic due to the need to reduce the lengthy development cycles…
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Highly Cited
2018
Highly Cited
2018
SCALE-Sim: Systolic CNN Accelerator Simulator
A. Samajdar
,
Yuhao Zhu
,
P. Whatmough
,
Matthew Mattina
,
T. Krishna
2018
Corpus ID: 53663418
Systolic Arrays are one of the most popular compute substrates within Deep Learning accelerators today, as they provide extremely…
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Highly Cited
2017
Highly Cited
2017
Automated systolic array architecture synthesis for high throughput CNN inference on FPGAs
Xuechao Wei
,
Cody Hao Yu
,
+5 authors
J. Cong
Design Automation Conference
2017
Corpus ID: 4602189
Convolutional neural networks (CNNs) have been widely applied in many deep learning applications. In recent years, the FPGA…
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Highly Cited
1987
Highly Cited
1987
LUSTRE: a declarative language for real-time programming
P. Caspi
,
D. Pilaud
,
N. Halbwachs
,
J. Plaice
ACM-SIGACT Symposium on Principles of Programming…
1987
Corpus ID: 18810875
LUSTRE is a synchronous data-flow language for programming systems which interact with their environments in real-time. After an…
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Highly Cited
1986
Highly Cited
1986
Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays
D. Moldovan
,
J. Fortes
IEEE transactions on computers
1986
Corpus ID: 27902771
A technique for partitioning and mapping algorithms into VLSI systolic arrays is presented in this paper. Algorithm partitioning…
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Highly Cited
1984
Highly Cited
1984
Automatic synthesis of systolic arrays from uniform recurrent equations
P. Quinton
International Symposium on Computer Architecture
1984
Corpus ID: 16129075
We describe a systematic method for the design of systolic arrays. This method may be used for algorithms that can be expressed…
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Highly Cited
1983
Highly Cited
1983
Recursive Least-Squares Minimization Using A Systolic Array
J. McWhirter
Optics & Photonics
1983
Corpus ID: 61115788
A systolic array for performing recursive least-squares minimization is desc/ performs an orthogonal triangularization of the…
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Highly Cited
1983
Highly Cited
1983
On the design of algorithms for VLSI systolic arrays
D. Moldovan
Proceedings of the IEEE
1983
Corpus ID: 7517251
This paper is concerned with the mapping of cyclic loop algorithms into special-purpose VLSI arrays. The mapping procedure is…
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Highly Cited
1982
Highly Cited
1982
Matrix Triangularization By Systolic Arrays
W. Gentleman
,
H. T. Kung
Optics & Photonics
1982
Corpus ID: 63527864
Given an n x p matrix X with p < n, matrix triangularization, or triangularization in short, is to determine an n x n nonsingular…
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Highly Cited
1982
Highly Cited
1982
Wafer-scale integration of systolic arrays
F. Leighton
,
C. Leiserson
23rd Annual Symposium on Foundations of Computer…
1982
Corpus ID: 58339072
This paper describes and analyzes several algorithms for constructing systolic array networks from cells on a silicon wafer. Some…
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