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Strain engineering

Known as: Dual Stress Liner, Dual stress, Strained engineering 
Strain engineering refers to a general strategy employed in semiconductor manufacturing to enhance device performance. Performance benefits are… 
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Related topics

Related topics

6 relations
Electron mobilityLattice constantMicroprocessorSemiconductor

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Review
2016
Review
2016
Recent advances in bioengineering of the oleaginous yeast Yarrowia lipolytica
The oleaginous yeast, Yarrowia lipolytica, is becoming increasing popular for metabolic engineering applications. Advances in… 
2015
2015
High Brightness GaN-on-Si Based Blue LEDs Grown on 150 mm Si Substrates Using Thin Buffer Layer Technology
The commercial adoption of GaN-on-Si light emitting diode (LED) chip technology is lagging behind incumbent sapphire substrates… 
2014
2014
Photonic Crystal Microcavities in a Microelectronics 45-nm SOI CMOS Technology
We demonstrate the first monolithically integrated linear photonic crystal microcavities in an advanced silicon-on-insulator… 
2012
2012
Influence of 60-MeV Proton-Irradiation on Standard and Strained n- and p-Channel MuGFETs
In this work the proton irradiation influence on Multiple Gate MOSFETs (MuGFETs) performance is investigated. This analysis was… 
2009
2009
High-Performance Metal/High-$k$ n- and p-MOSFETs With Top-Cut Dual Stress Liners Using Gate-Last Damascene Process on (100) Substrates
Newly proposed mobility-booster technologies are demonstrated for metal/high-k gate-stack n- and pMOSFETs. The process… 
2007
2007
Highly Efficient Stress Transfer Techniques in Dual Stress Liner CMOS Integration
Double disposable sidewall spacers (DDSW) process and adhesion reinforcement technique (ART) are proposed, for the first time… 
2006
2006
A 0.127 μm2 High Performance 65nm SOI Based embedded DRAM for on-Processor Applications
The authors present a 65nm embedded DRAM cell (0.127 μm2 cell size) on unpatterned SOI fabricated using standard high performance… 
2005
2005
Dual stress capping layer enhancement study for hybrid orientation finFET CMOS technology
3D stress in FinFET and tri-gate FET structures induced by a tensile or compressive capping layer is studied via simulation. The… 
2003
2003
Modelling of silo discharge and filling problems by the material point method
Abstract: The problems of flow of a granular material in the processes of silo discharge and filling are considered. Dynamic, two… 
1963
1963
Rumen Function in the Camel
IN May 1962, samples of strained rumen contents obtained from 25 camels in the Alice Springs area of Central Australia were made… 
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