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Specman

Specman is an EDA tool that provides advanced automated Functional verification of hardware designs. It provides an environment for working with… 
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Related topics

Related topics

4 relations
Electronic design automationIncisiveVHDLVerilog

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Implementation of Open Core Protocol transaction Verification IP using System Verilog UVM methodology
- This paper presents Implementation of the Reusable Open Core protocol (OCP) transaction Verification IP (VIP) using universal… 
2013
2013
Using the Extension Capability and the Reflection Interface of Specman/e for Automatic Memoization
The e hardware verification language provides a powerful macro-definition syntax which can be used to extend the language, i.e… 
2010
2010
Verification Design Flow for Embedded Software in Specman
This paper introduces a design flow for embedded software verification based on Specman.This design flow is implemented in… 
2009
2009
A reusable coverage-driven verification environment for Network-on-Chip communication in embedded system platforms
Functional verification plays an important role in the design flow of an Intellectual Property (IP) core and, in general, of an… 
2008
2008
A Biblical vision for Africa's development? M.T. Specman : boekresensie
Hierdie boek is belangrik aangesien dit deur 'n (swart) Afrikaan uit Suid-Afrika geskryf is wat nie kritiekloos teenoor die… 
2007
2007
Building Transaction-Based Acceleration Regression Environment using Plan-Driven Verification Approach
The paper presents flows and methodologies for using plan-driven verification testbenches with accelerated verification engines… 
2007
2007
8 – Analyzing e Code
2006
2006
Specman Based Verification Methodology for Embedded Memories
Embedded memories have become integral part of any system on chip (SOC) occupying about 60% of the chip area in most cases… 
Review
2004
Review
2004
Safe integration of parameterized IP
1999
1999
Verification of the PalmDSPCore Using Pseudo Random Techniques
  • 1999
  • Corpus ID: 16571793
The advanced variable size scalable architecture has many features that present significant verification challenges to ensure… 
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