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Verilog

Known as: IEEE 1364, .v, Verilog 95 
Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design… 
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Papers overview

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2011
2011
This paper presents a wavelength assignment algorithm suitable for optical networks mainly impaired by physical layer effects… 
2010
2010
Both FPGAs and ASICs are widely used as the technology for comparing SHA-3 hardware benchmarking process. However, the im- pact… 
2010
2010
The shooting method is largely employed to determine the steady-state working condition of both autonomous and nonautonomous… 
2007
2007
In this paper, we present an AXI compliant Network Interface (NI) for NoC, which can deal with the reordering problem and support… 
2005
2005
  • A. Jantsch
  • 2005
  • Corpus ID: 1648940
Axel Jantsch Royal Institute of Technology 4. 
2000
2000
In this paper, we discuss a new paradigm called Multiclock Esterel, based on the paradigm of the synchronous reactive language… 
1999
1999
This paper describes integer multiplier design optimizations for FPGA technology. The changes in partial product generator… 
1998
1998
We propose a new architectural reference based on programmable logic devices that we call Plastic Cell Architecture (PCA). PCA is… 
Highly Cited
1998
Highly Cited
1998
From the Publisher: With this book, you can: Start writing synthesizable Verilog models quickly. See what constructs are… 
Review
1993
Review
1993
Historical Survey Recent Techniques and Orientations - Reforestation in Cleared Areas Silvicultural Rules for the Principal…