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Software testability

Software testability is the degree to which a software artifact (i.e. a software system, software module, requirements- or design document) supports… 
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Related topics

Related topics

10 relations
Finite-state machineMatthew HennessyNon-functional requirementPortability testing

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2006
Highly Cited
2006
Design for Testability
Highly Cited
1999
Highly Cited
1999
POWERTEST: a tool for energy conscious weighted random pattern testing
Due to the increasing use of portable computing and wireless communications systems, energy consumption is of major concern in… 
Highly Cited
1995
Highly Cited
1995
The Time-Triggered Approach to Real-Time System Design
In this paper the basic assumptions that govern the design of timetriggered(TT) real-time systems are examined and the… 
1994
1994
Behavioral synthesis for hierarchical testability of controller/data path circuits with conditional branches
  • S. BhatiaN. Jha
  • Proceedings IEEE International Conference on…
  • 1994
  • Corpus ID: 5556229
Most existing behavioral synthesis systems put emphasis on optimizing area and performance. Only recently has some research been… 
1994
1994
Retiming sequential circuits to enhance testability
This paper presents a technique to enhance the testability of sequential circuits by repositioning registers. A novel retiming… 
Highly Cited
1994
Highly Cited
1994
Microarchitectural Synthesis of VLSI Designs with High Test Concurrency
The testability of a VLSI design is strongly affected by its register-transfer level (RTL) structure. Since the high-level… 
Highly Cited
1990
Highly Cited
1990
An optimization based approach to the partial scan design problem
The problem of selecting flip-flops for inclusion into a partial scan path is formulated as an optimization problem. Scan flip… 
Highly Cited
1989
Highly Cited
1989
A synthesis and optimization procedure for fully and easily testable sequential machines
The authors outline a synthesis procedure which beginning from a state transition graph (STG) description of a sequential machine… 
Highly Cited
1987
Highly Cited
1987
Designing CMOS Circuits for Switch-Level Testability
Conventional testing techniques often fail to be effective for CMOS combinational circuits, since most of their switch-level… 
Highly Cited
1981
Highly Cited
1981
Node-fault diagnosis and a design of testability
A concept of k-node-fault testability is introduced. A sufficient and almost necessary condition for testability as well as the… 
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