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SWAR

SIMD within a register (SWAR) is a technique for performing parallel operations on data contained in a processor register. SIMD stands for single… Expand
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Related topics

Related topics

14 relations
3DNow!Bit slicingBit-level parallelismDigital signal processor
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Broader (1)

Parallel computing

Papers overview

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2019
2019
Stable emergent formations for a swarm of autonomous car-like vehicles
A biological swarm is an ideal multi-agent system that collectively self-organizes into bounded, if not stable, formations. A… Expand
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2019
2019
Sciences pour l'ingénieur
 
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2016
2016
Fracture patterns and petrophysical properties of carbonates undergoing regional folding: A case study from Kurdistan, N Iraq
Abstract The Zagros-Taurus fold and thrust belt hosts a prolific hydrocarbon system. Most hydrocarbon reserves are stored in… Expand
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2014
2014
Pharmacognostic and Phytochemical Evaluation of Chrysophyllum cainito Linn. Leaves
Chrysophyllum cainito L. (Sapotaceae); commonly known as Star Apple is a tropical tree native to lowland of Central America and… Expand
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Review
2014
Review
2014
Social Media Risks and Benefits: A Public Sector Perspective
Social media are becoming an important intermediary for interaction between governments, governments and citizens, and… Expand
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2012
2012
Swar The Voice Operated PC
Keyboard, although a popular medium, is not very convenient as it requires a certain amount of skill for effective usage. A mouse… Expand
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2011
2011
Swar-Suchak: Open source voice enabled information retrieval system
The constant improvement of both hardware and software related to mobile computing is enhancing the capabilities of mobile… Expand
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2009
2009
Architectural support for SWAR text processing with parallel bit streams: the inductive doubling principle
Parallel bit stream algorithms exploit the SWAR (SIMD within a register) capabilities of commodity processors in high-performance… Expand
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Highly Cited
2006
Highly Cited
2006
Data-Parallel Programming on the Cell BE and the GPU using the RapidMind Development Platform
The Cell BE processor is capable of achieving very high levels of performance via parallel computation. The processors in video… Expand
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2004
2004
River Stage For ecasting with Par ticle Swar m Optimization
Abstr act. An accurate water stage prediction allows the pertinent authority to issue a forewarning of the impending flood and to… Expand
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