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SPECint
Known as:
CINT2000
SPECint is a computer benchmark specification for CPU integer processing power. It is maintained by the Standard Performance Evaluation Corporation…
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Related topics
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Benchmark (computing)
Central processing unit
Compiler
Dhrystone
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2007
2007
Non-Inclusion Property in Multi-Level Caches Revisited
M. Zahran
,
K. Albayraktaroglu
,
M. Franklin
International Journal of Computers and Their…
2007
Corpus ID: 18767671
The center of gravity of computer architecture is moving toward memory systems. Barring breakthrough microarchitectural…
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2007
2007
Asymmetrically Banked Value-Aware Register Files
Shuai Wang
,
Hongyan Yang
,
Jie S. Hu
,
Sotirios G. Ziavras
IEEE Computer Society Annual Symposium on VLSI
2007
Corpus ID: 7383154
Designing high-performance low-power register files is of critical importance to the continuation of current performance advances…
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Highly Cited
2007
Highly Cited
2007
Speculative thread decomposition through empirical optimization
Troy A. Johnson
,
R. Eigenmann
,
T. N. Vijaykumar
ACM SIGPLAN Symposium on Principles & Practice of…
2007
Corpus ID: 1024039
Chip multiprocessors (CMPs), or multi-core processors, have become a common way of reducing chip complexity and power consumption…
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2006
2006
Optimal register reassignment for register stack overflow minimization
Yoonseo Choi
,
Hwansoo Han
TACO
2006
Corpus ID: 15341580
Architectures with a register stack can implement efficient calling conventions. Using the overlapping of callers' and callees…
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Highly Cited
2006
Highly Cited
2006
In-Register Duplication: Exploiting Narrow-Width Value for Improving Register File Reliability
Jie S. Hu
,
Shuai Wang
,
Sotirios G. Ziavras
Dependable Systems and Networks
2006
Corpus ID: 15785982
Protecting the register value and its data buses is crucial to reliable computing in high-performance microprocessors due to the…
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2006
2006
A decoupled KILO-instruction processor
M. Pericàs
,
A. Cristal
,
R. González
,
Daniel A. Jiménez
,
M. Valero
The Twelfth International Symposium on High…
2006
Corpus ID: 7444288
Building processors with large instruction windows has been proposed as a mechanism for overcoming the memory wall, but finding a…
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2006
2006
Low-Power, High-Performance Architecture of the PWRficient Processor Family
Tse-Yu Yeh
IEEE Micro
2006
Corpus ID: 12138555
The dual-core PA6T-1682M system on chip (SoC) is the first design in the PWRficient family of high-performance, low-power…
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Highly Cited
2001
Highly Cited
2001
On the importance of points-to analysis and other memory disambiguation methods for C programs
R. Ghiya
,
Daniel M. Lavery
,
D. Sehr
ACM-SIGPLAN Symposium on Programming Language…
2001
Corpus ID: 10231810
In this paper, we evaluate the benefits achievable from pointer analysis and other memory disambiguation techniques for C/C…
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1996
1996
High-performance image processing using special-purpose cpu instructions: the ultrasparc visual inst
D. Rice
1996
Corpus ID: 11717058
The UltraSPARC-I processor implements, in addition to the SPARC v9 instruction set, a set of new instructions that accelerate…
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Highly Cited
1993
Highly Cited
1993
Efficient Support for Multicomputing on ATM Networks
C. Thekkath
,
H. Levy
,
Ed Lazowska
1993
Corpus ID: 37641517
AbstractThe emergence of a new generation of networks will dramatically increase the attractiveness ofloosely-coupled…
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