Non-Inclusion Property in Multi-Level Caches Revisited

@article{Zahran2007NonInclusionPI,
  title={Non-Inclusion Property in Multi-Level Caches Revisited},
  author={Mohamed M. Zahran and Kursad Albayraktaroglu and Manoj Franklin},
  journal={I. J. Comput. Appl.},
  year={2007},
  volume={14},
  pages={99-108}
}
The center of gravity of computer architecture is moving toward memory systems. Barring breakthrough microarchitectural techniques to move processor performance to higher levels, we are likely to see more and more on-chip cache memory in the years to come. Three levels of on-chip cache memory is not uncommon in recent designs. The increasing reliance on more on-chip cache requires more sophisticated cache design techniques and perhaps a rethinking of some cache concepts. We believe that a prime… CONTINUE READING
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