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Runahead

Runahead is a technique that allows a microprocessor to pre-process instructions during cache miss cycles instead of stalling. The pre-processed… 
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Related topics

Related topics

14 relations
Application checkpointingBranch predictorCPU cacheComputer data storage

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2020
2020
Semantic prefetching using forecast slices
Modern prefetchers identify memory access patterns in order to predict future accesses. However, many applications exhibit… 
2016
2016
The runahead network-on-chip
With increasing core counts and higher memory demands from applications, it is imperative that networks-on-chip (NoCs) provide… 
2012
2012
NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution
Soft processors often use data caches to reduce the gap between processor and main memory speeds. To achieve high efficiency… 
2010
2010
Efficient Runahead Threads
Runahead Threads (RaT) is a promising solution that enables a thread to speculatively run ahead and prefetch data instead of… 
2010
2010
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software… 
2010
2010
An Efficient Non-blocking Data Cache for Soft Processors
Soft processors often use data caches to reduce the gap between processor and main memory speeds. To achieve high efficiency… 
2009
2009
Combining thread level speculation helper threads and runahead execution
With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional… 
2006
2006
Efficient runahead execution processors
High-performance processors tolerate latency using out-of-order execution. Unfortunately, today's processors are facing memory… 
2006
2006
MLP-Aware Cache Replacement A Case for MLP-Aware Cache Replacement
Performance loss due to long-latency memory accesses can be reduced by servicing multiple memory accesses concurrently. The… 
2001
2001
Inexpensive throughput enhancement in small-scale embedded microprocessors with block multithreading: extensions, characterization, and tradeoffs
This paper examines differential multithreading (DMT) as an attractive organization for coping with pipeline stalls in small… 
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