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Phase-locked loop

Known as: Digital phase-locked loop, Phase-locked synchronization circuit, Phase-Lock Loop 
A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input… 
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Papers overview

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Highly Cited
2008
Highly Cited
2008
This paper describes a fractional-N PLL IC based on a new digital quantizer that replaces the DeltaSigma modulator (DeltaSigmaM… 
2006
2006
The fundamental design concepts for phase-locked loops implemented with integrated circuits are outlined. The necessary equations… 
Highly Cited
2005
Highly Cited
2005
A 240mW direct-conversion DVB-H receiver in a 0.35 /spl mu/m BiCMOS process is presented. The receiver covers UHF bands IV and V… 
1996
1996
In this issue, a special section on phase-locked loop (PLL) techniques has been organized. This special section was motivated by… 
1994
1994
The design of a 6 GHz fully monolithic phase-locked loop fabricated in a 1 /spl mu/m, 20 GHz BiCMOS technology is described. The… 
Highly Cited
1989
Highly Cited
1989
The concepts of an all digital phase-locked loop (DPLL), which contains a purely digital phase detector, loop filter and voltage… 
Highly Cited
1989
Highly Cited
1989
A second-order digital phase-locked loop may exhibit unusual behavior for some parameters due to a fractal boundary between the… 
1984
1984
In this work a new version of the cross-coupled phaselocked loop (CCPLL) interference canceller is presented. This detector… 
1977
1977
A heterodyne phase locked loop has been studied in detail with particular emphasis on the spurious mode of locking called False… 
1975
1975
This paper describes a motor control circuit for a dc motor using phase-locked loop techniques. The purpose of such a control…