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Phase-locked loop

Known as: Digital phase-locked loop, Phase-locked synchronization circuit, Phase-Lock Loop 
A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input… 
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2009
2009
This paper describes a fast lock scheme for phaselocked loops (PLLs). The proposed scheme utilizes mostly digital logic and… 
2006
2006
The fundamental design concepts for phase-locked loops implemented with integrated circuits are outlined. The necessary equations… 
2002
2002
The clock distribution network and the generation circuitry are critical components of current synchronous digital systems and… 
Highly Cited
2001
Highly Cited
2001
A +2 dBm Bluetooth transceiver in 0.5 /spl mu/m SiGe BiCMOS consumes 22 mW at 2 V. The transmitter uses a /spl Delta//spl Sigma… 
Highly Cited
1999
Highly Cited
1999
Integrated photonic radio frequency (RF) phase shifters with dc voltage control have been realized using a nested dual Mach… 
1998
1998
This paper describes the design and implementation of a current-mode phase-locked loop (PLL) using static and dynamic (log-domain… 
1994
1994
Optimized design conditions are presented for a phase-locked loop (PLL) used as a functional block in data recovery systems with… 
1989
1989
A design of an all-digital phase-locked loop (DPLL) with direct frequency synthesis is proposed for generating signals that… 
1984
1984
In this work a new version of the cross-coupled phaselocked loop (CCPLL) interference canceller is presented. This detector… 
1968
1968
In this paper a model for a carrier plus narrowband noise is presented, and with its aid the expected number of cycle slipping…