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Operand isolation

In electronic low power digital synchronous circuit design, operand isolation is a technique for minimizing the energy overhead associated with… 
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Related topics

Related topics

4 relations
AND gateClock gatingPipeline (computing)Synchronous circuit

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
Verification of Power-Management Specification at Early Stages of Power-Constrained Systems Design
Nowadays, power is a dominant factor that constrains highly integrated hardware-systems designs. The implied problems of high… 
2017
2017
Low-power multi-size HEVC DCT architecture proposal for QFHD video processing
The demand for higher quality video has increased in the past few years, due to the huge amount of electronic devices that… 
2014
2014
Operand Isolation with Reduced Overhead for Low Power Datapath Design
Dynamic power dissipation due to redundant switching is an important metric in data-path design. This paper focuses on the use of… 
2010
2010
System level simulation guided approach to improve the efficacy of clock-gating
Clock-gating is a well known technique to reduce dynamic power consumption of a hardware design. In any clock-gating based power… 
2009
2009
LOW-POWER DESIGN OF DIGITAL SIGNAL PROCESSING BLOCK FOR INTEGRATED POWER METER
– The paper considers the architecture and low power design aspects of the digital signal processing block (DSP) embedded into a… 
2007
2007
Low Power Circuit Architecture of AES Crypto Module for Wireless Sensor Network
— Recently, much research has been conducted for security for wireless sensor networks and ubiquitous computing. Security issues… 
2007
2007
Low-power implementations of DSP through operand isolation and clock gating
The advent of implantable devices such as digital cochlea has made low power circuit design an increasingly important research… 
2007
2007
Exploration of Low Power Adders for a SIMD Data Path
Hardware for ambient intelligence needs to achieve extremely high computational efficiency (up to 40GOPS/W). An important way for… 
2006
2006
Novel low-overhead operand isolation techniques for low-power datapath synthesis
Power consumption in datapath modules due to redundant switching is an important design concern for high-performance applications… 
2005
2005
Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis
Power consumption in datapath modules due to redundant switching is an important design concern for high-performance applications… 
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