Memory-level parallelism

Known as: MLP, Memory Level Parallelism 
Memory-level parallelism (MLP) is a term in computer architecture referring to the ability to have pending multiple memory operations, in particular… (More)
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Papers overview

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2018
2018
Modern out-of-order processors have increased capacity to exploit instruction level parallelism (ILP) and memory level… (More)
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2018
2018
This paper proposes an analytical model to predict Memory-Level Parallelism (MLP) in a superscalar processor. We profile the… (More)
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2013
2013
This paper proposes a new FPGA-based embedded computer architecture, which focuses on how to construct an application-specific… (More)
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2012
2012
As memory accesses increasingly limit the overall performance of reconfigurable accelerators, it is important for high level… (More)
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2007
2007
A thread executing on a simultaneous multithreading (SMT) processor that experiences a long-latency load will eventually stall… (More)
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2006
2006
Recently-proposed processor microarchitectures that generate high Memory Level Parallelism (MLP) promise substantial performance… (More)
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2006
2006
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains… (More)
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2005
2005
This paper studies the impact of off-chip store misses on processor performance for modern commercial applications. The… (More)
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Highly Cited
2004
Highly Cited
2004
The performance of memory-bound commercial applicationssuch as databases is limited by increasing memory latencies. Inthis paper… (More)
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Highly Cited
2003
Highly Cited
2003
The ever-increasing computational power of contemporary microprocessors reduces the execution time spent on arithmetic… (More)
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