FAQ

Instruction-level parallelism

Known as: ILP, Instruction level parallelism 
Instruction-level parallelism (ILP) is a measure of how many of the instructions in a computer program can be executed simultaneously. There are two… (More)
Wikipedia

Topic mentions per year

Topic mentions per year

1960-2017
05010019602017

Related topics

Related topics

36 relations
Algorithmic efficiencyCentral processing unitCompile timeCompiler
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Broader (1)

Parallel computing

Related mentions per year

Related mentions per year

1936-2018
19401960198020002020
Instruction-level parallelism
Parallel computing
Central processing unit
Compiler
Run time (program lifecycle phase)
Cryptography

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2005
2005
Register Saturation in Instruction Level Parallelism
The registers constraints are usually taken into account during the scheduling pass of an acyclic data dependence graph (DAG… (More)
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2004
2004
Scalable Instruction-Level Parallelism
This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip… (More)
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Highly Cited
2004
Highly Cited
2004
Trimaran: An Infrastructure for Research in Instruction-Level Parallelism
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is… (More)
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Highly Cited
1998
Highly Cited
1998
Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine
Increasing demand for both greater parallelism and faster clocks dictate that future generation architectures will need to… (More)
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Review
1998
Review
1998
Instruction-Level Parallelism for Reconfigurable Computing
Reconngurable coprocessors can exploit large degrees of instruction-level parallelism (ILP). In compiling sequential code for re… (More)
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Highly Cited
1997
Highly Cited
1997
Converting Thread-Level Parallelism to Instruction-Level Parallelism via Simultaneous Multithreading
To achieve high performance, contemporary computer systems rely on two forms of parallelism: instruction-level parallelism (ILP… (More)
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Highly Cited
1997
Highly Cited
1997
Exploiting Instruction Level Parallelism In Processors By Caching Scheduled Groups
Modern processors employ a large amount of hardware to dynamically detect parallelism in single-threaded programs and maintain… (More)
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1996
1996
Combining optimization for cache and instruction-level parallelism
Current architectural trends in instruction-level parallelism (ILP) have significantly increased the computational power of… (More)
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Highly Cited
1991
Highly Cited
1991
Limits of Instruction-Level Parallelism
Growing interest in ambitious multiple-issue machines and heavilypipelined machines requires a careful examination of how much… (More)
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Highly Cited
1989
Highly Cited
1989
Available Instruction-Level Parallelism for Superscalar and Superpipelined Machines
Superscalar machines can issue several instructions per cycle. Superpipelined machines can issue only one instruction per cycle… (More)
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