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HPL-PD Architecture Specification:Version 1.1
instruction-level parallelism, parametric architecture, EPIC, VLIW, superscalar, speculative execution, predicated execution, programmatic cache control, run-time memory disambiguation, branchExpand
Register allocation for software pipelined loops
TLDR
These alternatives are comprehensively tested against over one thousand loops to determine the best register allocation strategy, both with and without the hardware support for software pipelined loops. Expand
Bitwidth cognizant architecture synthesis of custom hardwareaccelerators
TLDR
Experimental results show that exploiting integer bitwidth substantially reduces the gate count of PICO-synthesized hardware accelerators across a range of applications. Expand
EPIC: Explicititly Parallel Instruction Computing
TLDR
The authors developed the Explicitly Parallel Instruction Computing (EPIC) style of architecture to enable higher levels of instruction-level-parallelism without unacceptable hardware complexity. Expand
Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers
TLDR
This work presents barrier filters, a mechanism for fast barrier synchronization on-chip multi-processors to enable vector computations to be efficiently distributed across the cores of a CMP. Expand
On Predicated Execution
Predicated execution as required in Modulo Scheduling technique for parallelizing innermost loops with conditional statements is examined. We obtain an improved semantics for predicate operationsExpand
Code Generation Schema For Modulo Scheduled Loops
Parallelization of loops with exits on pipelined architectures
Modulo scheduling theory can be applied successfully to overlap Fortran DO loops on pipelined computers issuing multiple operations per cycle both with and without special loop architectural support.Expand
Challenges to Combining General-Purpose and Multimedia Processors
TLDR
A hair styling device including a housing providing an internal chamber and an opening therein for causing a vacuum in the chamber so that a lock of hair may be drawn into the chamber for drying and styling. Expand
Analysis techniques for predicated code
TLDR
This work presents new techniques for analyzing predicated code and shows how conventional data flow algorithms can be systematically upgraded to be predicate sensitive by incorporating information about predicates into compiler analysis. Expand
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