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Memory bus
Known as:
RAM bus
The memory bus is the computer bus which connects the main memory to the memory controller in computer systems. Originally, general-purpose buses…
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AMD Radeon 400 series
ATI Radeon R200 series
Address bus
Alpha 21064
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Motherboard
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Point-to-Point System Design : Layout and Routing Tips for LPDDR 2 and LPDDR 3 Devices
2014
Corpus ID: 10965143
Introduction LPDDR2 and LPDDR3 devices require a well-designed environment, package, and PCB to support today’s high-speed/low…
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2013
2013
RowClone: Fast and Efficient In-DRAM Copy and Initialization of Bulk Data
Vivek Seshadri
,
Yoongu Kim
,
+8 authors
T. Mowry
2013
Corpus ID: 3065319
Many programs initialize or copy large amounts of memory data. Initialization and copying are forms of memory operations that do…
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2013
2013
Accuracy and performance analysis of Harris Corner computation on tightly-coupled processor arrays
É. Sousa
,
Alexandru Tanase
,
Frank Hannig
,
J. Teich
Conference on Design and Architectures for Signal…
2013
Corpus ID: 7088589
Nowadays, computer vision algorithms have countless application domains. On the one hand, these algorithms are typically…
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2012
2012
The parallelization of binary decision diagram operations for model checking
T. V. Dijk
2012
Corpus ID: 59785921
2012
2012
The Memory Bus Considered Harmful
J. Carberry
2012
Corpus ID: 54993120
The implications of flexible communication have been farreaching and pervasive. Given the current status of amphibious symmetries…
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2009
2009
Characterizing Application Performance Sensitivity to R esource Contention in Multicore Architectures
Haoqiang Jin
,
R. Hood
,
+5 authors
P. Mehrotra
2009
Corpus ID: 6753818
Contention for shared resources in the memory hierarchy can have a profound effect on the performance of applications running on…
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2008
2008
Fine tuning matrix multiplications on multicore
Stéphane Zuckerman
,
Marc Pérache
,
W. Jalby
International Conference on High Performance…
2008
Corpus ID: 601760
Multicore systems are becoming ubiquituous in scientificcomputing. As performance libraries are adapted to such systems…
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2007
2007
Shared Virtual Memory Across SMP Nodes Using Automatic Update: Protocols and Performance
A. Bilas
,
L. Iftode
,
David R. Martin
,
J. Singh
2007
Corpus ID: 1847924
As the workstation market moves form single processor to small-scale shared memory multiprocessors, it is very attractive to…
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1996
1996
Characterizing Shared Memory and Communication Performance : A Case Study of the Convex SPP – 1000
Gheith A. Abandah
,
E. Davidson
1996
Corpus ID: 14567186
The objective of this paper is to develop models that characterize the memory and communication performance of shared-memory…
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1982
1982
Bounds on Bus and Memory Interference in a class of Multiple Bus Multiprocessor Systems
M. Marson
IEEE International Conference on Distributed…
1982
Corpus ID: 44461629
BUS AND CACHE MEMORY ORGANIZATIONS FOR MULTIPROCESSORS by Donald Charles Winsor Chairman: Trevor Mudge The single shared bus…
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