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Address bus

An address bus is a computer bus (a series of lines connecting two or more devices) that is used to specify a physical address. When a processor or… 
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Related topics

Related topics

50 relations
26-bit48-bit64-bit computingAccelerated Graphics Port

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
Verification of Power-Management Specification at Early Stages of Power-Constrained Systems Design
Nowadays, power is a dominant factor that constrains highly integrated hardware-systems designs. The implied problems of high… 
2006
2006
A low-cost memory remapping scheme for address bus protection
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can… 
2005
2005
Energy optimization in memory address bus structure for application-specific systems
Energy optimization for high-capacitance on-chip buses has become a critical problem in VLSI design, especially for embedded or… 
2005
2005
A low-power 2.5-GHz 90-nm level 1 cache and memory management unit
The design of a 90-nm virtually addressed cache subsystem with separate 32-kB instruction and data caches is described. The… 
2002
2002
ALBORZ: Address Level Bus Power Optimization
In this paper we introduce a new low power address bus encoding technique, and the resulting code, named ALBORZ. The ALBORZ code… 
2002
2002
Efficient power reduction techniques for time multiplexed address buses
We address the problem of reducing power dissipation on the time multiplexed address buses employed by contemporary DRAMs in SOC… 
Highly Cited
1999
Highly Cited
1999
Low-power memory mapping through reducing address bus activity
  • P. PandaN. Dutt
  • IEEE Transactions on Very Large Scale Integration…
  • 1999
  • Corpus ID: 15013308
Arrays in behavioral specifications that are too large to fit into on-chip registers are usually mapped to off-chip memories… 
Highly Cited
1996
Highly Cited
1996
Thumb: reducing the cost of 32-bit RISC performance in portable and consumer applications
  • L. GoudgeS. Segars
  • COMPCON '96. Technologies for the Information…
  • 1996
  • Corpus ID: 206568018
This article discusses a RISC architectural innovation from ARM known as Thumb. High-end embedded control applications such as… 
1996
1996
Reducing address bus transition for low power memory mapping
  • P. PandaN. Dutt
  • Proceedings ED&TC European Design and Test…
  • 1996
  • Corpus ID: 12473373
We present low power techniques for mapping arrays in behavioral specifications to physical memory, specifically for memory… 
1994
1994
Reducing Power Consumption at the Control Path of High Performance Microprocessors
Low power embedded processors become more important for portable applications. For CMOS circuits, power is consumed during the… 
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