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Macrocell array
Known as:
Macrocell (disambiguation)
, Macrocell (logic)
Programmable logic devices, such as programmable array logic and complex programmable logic devices, typically have a macrocell on every output pin.
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Related topics
Related topics
16 relations
Application-specific integrated circuit
Arithmetic logic unit
Complex programmable logic device
Cray X-MP
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Papers overview
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2017
2017
Comparative Study of Strength and Corrosion Resistant Properties of Plain and Blended Cement Concrete Types
V. Saraswathy
,
S. Karthick
,
Han-seung Lee
,
Seung-Jun Kwon
,
Hyun-Min Yang
2017
Corpus ID: 56307384
The relative performances of mechanical, permeability, and corrosion resistance properties of different concrete types were…
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2014
2014
Macro-small cell grouping in dual connectivity LTE-B networks with non-ideal backhaul
A. Mukherjee
IEEE International Conference on Communications…
2014
Corpus ID: 32970896
Interspersing small cell eNodeBs (SCeNBs) among macrocell eNodeBs (MeNBs) is a key solution for boosting the spectral efficiency…
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2011
2011
Femtocell Spectrum Access Underlaid in Fractional Frequency Reused Macrocell
Zhao Zhao
,
Feng Zheng
,
A. Wilzeck
,
T. Kaiser
International Conference on Intelligent Cloud…
2011
Corpus ID: 28912595
This paper focuses on the Femtocell spectrum access problems when a certain amount of Femto Base Stations (FBS) are underlying in…
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2009
2009
Macrocell offloading benefits in joint macro-and femtocell deployments
H. Claussen
,
D. Calin
IEEE International Symposium on Personal, Indoor…
2009
Corpus ID: 22995462
Femtocells are low-cost, low-power cellular base stations that are designed to provide high quality cellular service in…
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2000
2000
Verification of 3G radio network dimensioning rules with static network simulations
J. Laiho-Steffens
,
A. Wacker
,
K. Sipila
VTC-Spring. IEEE 51st Vehicular Technology…
2000
Corpus ID: 62532952
The third generation cellular systems will offer services well beyond the capabilities of today's networks. For an operator to…
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1989
1989
30-ps 7.5-GHz GaAs MESFET macrocell array
M. Ino
,
M. Togashi
,
S. Horiguchi
,
M. Hirayama
,
H. Kataoka
1989
Corpus ID: 56828057
An ECL-compatible GaAs 250-gate macrocell array has been successfully designed and fabricated using a three-level series gate low…
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1988
1988
43ps/5.2ghz Bipolar Macrocell Array Lsis
M. Suzuki
,
M. Hirata
,
S. Konada
IEEE International Solid-State Circuits…
1988
Corpus ID: 62639180
A FAMILY OF BIPOLAR 43ps/CML AND 5.2GHz FLIP-FLOP macrocell array LSIs wjll be reported. The design utilized Cascaded circuit…
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1985
1985
An 80ps 2500-gate bipolar macrocell array
S. Horiguchi
,
M. Suzuki
,
H. Ichino
,
S. Konaka
,
T. Sakai
IEEE International Solid-State Circuits…
1985
Corpus ID: 60868023
This paper will cover a 2500-gate bipolar array with 80ps delay, which uses a macro cell design and 1μ rules. A 7.5ns 16b…
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1984
1984
A 333 ps/800 MHz 7 K-gate bipolar macrocell array employing 4 level metallization
M. Suzuki
,
S. Horiguchi
IEEE Journal of Solid-State Circuits
1984
Corpus ID: 10192613
An ECL100K-compatible, bipolar, subnanosecond macrocell array has been developed. A new macrocell structure is proposed, using a…
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1982
1982
A 2500 gate bipolar macrocell array with 250 ps gate delay
A. Bass
IEEE Journal of Solid-State Circuits
1982
Corpus ID: 43546104
An oxide-isolated walled-emitter structure has been developed to obtain high performance and high packing density. Using this…
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