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Complex programmable logic device

Known as: CPLD 
A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features… 
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Related topics

Related topics

27 relations
Altera Hardware Description LanguageAltera QuartusApplication-specific integrated circuitArVid

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
RAM-Based Ultra-Lightweight FPGA Implementation of PRESENT
In this paper, two different FPGA implementations of the lightweight cipher PRESENT are proposed. The main design strategy for… 
2011
2011
Generic Complex Programmable Logic Device ( CPLD ) Board
The design and development of Generic Complex Programmable Logic Device (CPLD) Board is to emphasis on the reduction of the… 
Review
2011
Review
2011
Application and user perceptions of using the WebLab-Deusto-PLD in technical education
The paper shows the results of an integration of the remote laboratory WebLab-Deusto-PLD at the “Programmable Logic” course of… 
2007
2007
Sensorless Digital Peak Current Controller for Low-Power DC-DC SMPS Based on a Bi-Directional Delay Line
Peak current mode control is challenging to implement in integrated dc-dc converters for sub 1 W applications due to the need for… 
2006
2006
An automated, reconfigurable, low-power RFID tag
This paper describes an ultra low power active RFID tag and its automated design flow. RFID primitives to be supported by the tag… 
2006
2006
Tri-State Current Source Inverter WithImproved Dynamic Performance
Traditional dc-ac current source inverter (CSI) has a right-half-plane (RHP) zero in its control-to-output transfer function… 
2005
2005
A new phase-delay-free method to detect back EMF zero-crossing points for sensorless control of spindle motors
This paper introduces a new rotor position detecting method for the sensorless control of spindle motors in hard disk drives. The… 
2005
2005
State assignment for PAL-based CPLDs
In the paper, the state assignment methods of the finite state machines for PAL-based structures are presented. A main feature of… 
2002
2002
A technology mapping algorithm for CPLD architectures
In this paper, we propose a technology mapping algorithm for CPLD architectures. Our algorithm proceeds in two phases: mapping… 
1999
1999
The universal algorithm for fitting targeted to complex programmable logic devices
The universal approach to the problem of fitting the logic into a given architecture of Complex Programmable Logic Devices (CPLD… 
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