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Complex programmable logic device
Known as:
CPLD
A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features…
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Altera Hardware Description Language
Altera Quartus
Application-specific integrated circuit
ArVid
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Dual-metastability FPGA-based true random number generator
P. Wieczorek
2013
Corpus ID: 60834756
A novel concept of a true random number generator (TNRG) based on two metastable flip-flops in a FPGA circuit is introduced. Most…
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2013
2013
Design of VGA Display System Based on CPLD and SRAM
Deyi Shi
,
X. Ye
Third International Conference on Intelligent…
2013
Corpus ID: 15442065
As a video image display interface standard, VGA interface has been widely used in the embedded system. Due to the lack of…
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2012
2012
Area and speed oriented synthesis of FSMs for PAL-based CPLDs
R. Czerwinski
,
D. Kania
Microprocessors and microsystems
2012
Corpus ID: 43424486
2011
2011
Generic Complex Programmable Logic Device ( CPLD ) Board
Nagaraj Hediyal
2011
Corpus ID: 18444163
The design and development of Generic Complex Programmable Logic Device (CPLD) Board is to emphasis on the reduction of the…
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2006
2006
Measurement of ultrasonic displacement using complex programmable logic device
Zhang Hong-ping
2006
Corpus ID: 64095861
Based on ultrasound and using a complex programmable logic device(CPLD),precision measurement of displacement is studied.In this…
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2003
2003
Design of self-checking combinational circuits
T. Stankovic
,
M. Stojcev
,
G. Djordjevic
6th International Conference on…
2003
Corpus ID: 58371008
Very large scale integration (VLSI) technology has evolved to a level where large systems, previously implemented as printed…
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2002
2002
A technology mapping algorithm for CPLD architectures
Shih-Liang Chen
,
TingTing Hwang
,
C. Liu
IEEE International Conference on Field…
2002
Corpus ID: 41086299
In this paper, we propose a technology mapping algorithm for CPLD architectures. Our algorithm proceeds in two phases: mapping…
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2000
2000
Decomposition-based synthesis and its application in PAL-oriented technology mapping
D. Kania
Proceedings of the 26th Euromicro Conference…
2000
Corpus ID: 27771370
Most CPLD architectures include PAL based logic blocks containing a limited number of terms connected to the individual output…
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1999
1999
Design and verification techniques used in a graduate level VHDL course
A.I. Hussein
,
Don M. Gruenbacher
,
Noureddin M. Ibrahim
FIE'99 Frontiers in Education. 29th Annual…
1999
Corpus ID: 15111166
The use of the VHSIC Hardware Description Language (VHDL) has become very important to the simulation and implementation of…
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1994
1994
Designing with FPGAs and CPLDs
IV Jesse H. Jenkins
1994
Corpus ID: 106918359
This text covers the entire field of FPGAs and is intended to bring designers and engineers up to speed in this area. It…
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