Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 237,212,822 papers from all fields of science
Search
Sign In
Create Free Account
Complex programmable logic device
Known as:
CPLD
A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
27 relations
Altera Hardware Description Language
Altera Quartus
Application-specific integrated circuit
ArVid
Expand
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
Reconfigurable network accelerator for wireless sensor nodes
W. Liu
,
Zheng-qiang Wang
,
Shaohua Qu
,
Rong Luo
International Conference on Advanced…
2015
Corpus ID: 35728485
Power consumption is one of the most critical challenges in wireless sensor networks, as sensor nodes are powered by batteries in…
Expand
2013
2013
Design of locally-clocked asynchronous finite state machines using synchronous CAD tools
D. L. Oliveira
,
D. Bompean
,
T. Curtinhas
,
L. Faria
IEEE 4th Latin American Symposium on Circuits and…
2013
Corpus ID: 27378129
Controllers based on Synchronous Finite State Machines (SFSM) are widely used in the control unit design of embedded digital…
Expand
2012
2012
A 64$\,\times\,$64 CMOS Image Sensor With On-Chip Moving Object Detection and Localization
Bo Zhao
,
X. Zhang
,
Shoushun Chen
,
K. Low
,
H. Zhuang
IEEE transactions on circuits and systems for…
2012
Corpus ID: 6515113
This paper presents a 64×64 CMOS image sensor with on-chip moving object detection and localization capability. Pixel-level…
Expand
2011
2011
Generic Complex Programmable Logic Device ( CPLD ) Board
Nagaraj Hediyal
2011
Corpus ID: 18444163
The design and development of Generic Complex Programmable Logic Device (CPLD) Board is to emphasis on the reduction of the…
Expand
2010
2010
Field programmable gate array (FPGA) implementation of novel complex PN-code-generator- based data scrambler and descrambler
G. M. Bhat
,
M. Mustafa
,
S. A. Parah
,
Javaid Ahmad
2010
Corpus ID: 61723944
A novel technique for the generation of complex and lengthy code sequences using low- length linear feedback shift registers…
Expand
2007
2007
Optimization of logic circuit of Moore FSM on CPLD
A. Barkalov
,
L. Titarenko
,
S. Chmielewski
2007
Corpus ID: 60279838
M e t h o d o f d e c r e a s e o f n u m b e r o f PAL m a c r o c e l l s i n t h e c i r c u i t o f M o o r e F S M i s p r o…
Expand
2005
2005
Embedded system design with FPGA using HDL (lessons learned and pitfalls to be avoided)
R. J. Duckworth
International Conference on Microelectronics…
2005
Corpus ID: 10773989
This paper describes the authors experience with teaching VHDL (and more recently, Verilog) to undergraduate and graduate…
Expand
2005
2005
The real-time target track process system design and the fast arithmetic research
Hua-jun Song
,
M. Zhu
,
Shuo Hu
SPIE/OSA/IEEE Asia Communications and Photonics
2005
Corpus ID: 60834967
In order to resolve the contradiction between real-time and arithmetic complex in television tracking capture system, the paper…
Expand
2001
2001
Practical logic synthesis for CPLDs and FPGAs with PLA-style logic blocks
K. Yan
Proceedings of the ASP-DAC . Asia and South…
2001
Corpus ID: 22755402
In some modern FPGAs and CPLDs, PLA (programmable logic array)-style logic blocks can be used as the storage elements for…
Expand
2000
2000
Decomposition-based synthesis and its application in PAL-oriented technology mapping
D. Kania
Proceedings of the 26th Euromicro Conference…
2000
Corpus ID: 27771370
Most CPLD architectures include PAL based logic blocks containing a limited number of terms connected to the individual output…
Expand